upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 120

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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120
Notes 1. Lower default priority
Interrupt request o
Interrupt request s
Interrupt request i
Interrupt request l
2. Higher default priority
(level 2)
(level 2)
(level 3)
(level 1)
Main routine
EI
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Interrupt request n
Figure 5-7. Example of Multiple Interrupt Servicing (2/2)
request p
Interrupt request u
Interrupt
(level 2)
Interrupt request k
Interrupt
request j
(level 3)
(level 1)
(level 3)
(level 1)
request m
(level 2)
(level 2)
request t
Interrupt
Interrupt
EI
Servicing of o
EI
request q
Interrupt
(level 1)
Servicing of s
Servicing of i
Servicing of j
Servicing of l
Servicing of n
Note 1
Servicing of u
Note 2
Servicing of t
Servicing of m
User’s Manual U12768EJ4V1UD
EI
Servicing of p
request r
Interrupt
(level 0)
Servicing of k
EI
Servicing of q
If levels 3 to 0 are acknowledged
Interrupt request j is held pending because its
priority is lower than that of i. k that occurs after j
is acknowledged because it has a higher priority.
Interrupt requests m and n are held pending
because servicing of l is performed in the interrupt
disabled status.
Pending interrupt requests are acknowledged after
servicing of interrupt request l.
At this time, interrupt request n is acknowledged
first even though m has occurred first because the
priority of n is higher than that of m.
Pending interrupt requests t and u are
acknowledged after servicing of s.
Because the priorities of t and u are the same, u is
acknowledged first because it has a higher
default priority, regardless of the order in which the
interrupt requests have been generated.
EI
Servicing of r

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