upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 185

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(4) Data hold timing of capture register
(5) Setting valid edge
(6) Re-triggering one-shot pulse
If the valid edge is input to the TIn0 pin while 16-bit capture/compare register n1 (CRn1) is being read, CRn1
performs a capture operation, but this capture value is not guaranteed. However, the interrupt request signal
(INTTMn1) is set as a result of detection of the valid edge.
Before setting the valid edge of the TIn0 pin, stop the timer operation by resetting bits 2 and 3 (TMCn2 and
TMCn3) of 16-bit timer mode control register n to 0, 0. Set the valid edge by using bits 4 and 5 (ESn00 and
ESn01) of prescaler mode register n (PRMn).
(a) One-shot pulse output by software
(b) One-shot pulse output with external trigger
(c) One-shot pulse output function
Remark
Remark
Remark
When a one-shot pulse is being output, do not set OSPTn to 1. To output a one-shot pulse again, wait until
the current one-shot pulse output is complete.
If the external trigger occurs while a one-shot pulse is being output, it is ignored.
When using the one-shot pulse output function of timer 0 or 1 via a software trigger, the TIn0 pin cannot be
used as a general-purpose port pin.
CRn1 interrupt value
Capture read signal
TMn count value
n = 0, 1
n = 0, 1
n = 0, 1
Count pulse
Edge input
INTTMn1
Figure 7-27. Data Hold Timing of Capture Register
X
Capture operation
CHAPTER 7 TIMER/COUNTER FUNCTION
N
User’s Manual U12768EJ4V1UD
N + 1
N + 2
A capture operation is performed
but not guaranteed.
N+1
M
M + 1
M + 2
185

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