upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 135

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
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5.7 Interrupt Latency Time
interrupt servicing).
5.8 Periods in Which Interrupts Are Not Acknowledged
between an interrupt request non-sample instruction and the next instruction.
Interrupt acknowledgement operation
The following table describes the V850/SA1 interrupt latency time (from interrupt request generation to start of
INT1 to INT4: Interrupt acknowledgement processing
IF
ID
An interrupt is acknowledged while an instruction is being executed. However, no interrupt will be acknowledged
Interrupt request non-sample instructions
• EI instruction
• DI instruction
• LDSR reg2, 0x5 instruction (vs. PSW)
X
X
:
:
Minimum
Maximum
Instruction (start instruction of
interrupt servicing routine)
Interrupt Latency Time (System Clock)
Interrupt request
Invalid instruction fetch
Invalid instruction decode
System clock
Instruction 1
Instruction 2
Instruction 3
Internal Interrupt
Figure 5-16. Pipeline Operation at Interrupt Request Acknowledgement
11
18
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
External Interrupt
7 to 14 system clocks
13
20
User’s Manual U12768EJ4V1UD
Time to eliminate noise (2 system clocks) is also necessary
for external interrupts, except when:
IF
In IDLE/software STOP mode
External bus is accessed
Two or more interrupt request non-sample instructions
are executed in succession
An interrupt control register is accessed
IFX IDX
ID
IFX
EX MEM
INT1 INT2 INT3
4 system clocks
WB
Condition
IF
INT4
ID
EX MEM WB
135

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