upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 271

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

10.3.10 Arbitration
1
This kind of operation is called arbitration.
set at the timing by which the arbitration loss occurred, and the SCL and SDA lines are both set to high impedance,
which releases the bus.
stop condition is detected, etc.) and the ALD = 1 setting that has been made by software.
Note
Transfer lines
When several master devices simultaneously output a start condition (when STT is set to 1 before STD is set to
When one of the master devices loses in arbitration, an arbitration loss flag (ALD) in IIC status register 0 (IICS0) is
The arbitration loss is detected based on the timing of the next interrupt request (the eighth or ninth clock, when a
For details of interrupt request timing, see 10.3.5 I
Note STD:
Master 1
Master 2
), communication among the master devices is performed as the number of clocks is adjusted until the data differs.
STT:
SDA
SDA
SDA
SCL
SCL
SCL
Bit 1 of IIC status register 0 (IICS0)
Bit 1 of IIC control register 0 (IICC0)
CHAPTER 10
Figure 10-15. Arbitration Timing Example
User’s Manual U12768EJ4V1UD
SERIAL INTERFACE FUNCTION
2
C interrupt request (INTIIC0).
Master 1 loses arbitration
Hi-Z
Hi-Z
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