upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 113

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

5.2.3 NP flag
is set when an NMI interrupt request has been acknowledged, and masks all interrupt requests to prohibit multiple
interrupts from being acknowledged.
After reset: 00000020H
5.2.4 Noise elimination of external interrupt request input pin
(1) Noise elimination of NMI and INTP0 to INTP3 pins
(2) Noise elimination of INTP4 to INTP6 pins
Symbol
PSW
The NP flag is a status flag that indicates that non-maskable interrupt (NMI) servicing is under execution. This flag
The noise of the NMI pin and INTP0 to INTP3 pins is eliminated by the noise eliminator using analog delay.
Therefore, signals input to the NMI and INTP0 to INTP3 pins are not detected as an edge, unless they maintain
their input level for a certain period. The edge is detected after a certain period has elapsed.
The NMI and INTP0 to INTP3 pins can be used for releasing the software STOP mode. In the software STOP
mode, the system clock is not used for noise elimination because the internal system clock is stopped.
The INTP4 to INTP6 pins incorporate a digital noise eliminator. If the input level of the INTP pin is detected by
the sampling clock (f
as a noise. In the software STOP mode, the INTP4 to INTP6 pins cannot be used for releasing the software
STOP mode because the internal system clock is stopped. Note the following.
• If the input pulse width is between 2 and 3 clocks, whether the input pulse is detected as a valid edge or
• When noise is generated in synchronization with the sampling clock, this may not be recognized as noise. In
eliminated as noise is undefined. To securely detect the level as a valid edge, the same level input of 3 clocks
or more is required.
this case, eliminate the noise by adding a filter to the input pin.
31
NP
0
1
No NMI interrupt servicing
NMI interrupt currently being serviced
XX
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
) and the same level is not detected three successive times, the input pulse is eliminated
0
Figure 5-4. NP Flag (NP)
User’s Manual U12768EJ4V1UD
NMI Servicing State
8
NP EP ID SAT CY OV
7
6
5
4
3
2
S
1
0
Z
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