upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 287

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(1) Transmit shift registers 0, 1 (TXS0, TXS1)
(2) Receive shift registers 0, 1 (RX0, RX1)
(3) Receive buffer registers 0, 1 (RXB0, RXB1)
ASCK0, ASCK1
Remark
TXSn is the register for setting transmit data. Data written to TXSn is transmitted as serial data.
When the data length is set to 7 bits, bit 0 to bit 6 of the data written to TXSn is transmitted as serial data. Writing
data to TXSn starts the transmit operation.
TXSn can be written to by an 8-bit memory manipulation instruction. It cannot be read from.
RESET input sets these registers to FFH.
The RXn register converts serial data input via the RXD0 and RXD1 pins into parallel data. When one byte of
data is received at RXn, the received data is transferred to receive buffer registers 0 and 1 (RXB0, RXB1).
RX0 and RX1 cannot be manipulated directly by a program.
RXBn is used to hold receive data.
transferred.
When the data length is set to 7 bits, received data is sent to bit 0 to bit 6 of RXBn. In RXBn, the MSB must be
set to 0.
RXBn can be read by an 8-bit memory manipulation instruction. It cannot be written to.
RESET input sets RXBn to FFH.
Caution
RXD0, RXD1
TXD0, TXD1
TMx output is as follows:
UART0: TM3
UART1: TM2
Do not write to TXSn during a transmit operation.
Baud rate generator
CHAPTER 10
Figure 10-23. Block Diagram of UARTn
Receive buffer registers
Receive shift registers
0, 1 (RXB0, RXB1)
Receive control
parity check
0, 1 (RX0, RX1)
When one byte of data is received, one byte of new receive data is
User’s Manual U12768EJ4V1UD
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SERIAL INTERFACE FUNCTION
Internal bus
INTSR0,
INTSR1
Transmit shift registers
0, 1 (TXS0, TXS1)
Transmit control
parity addition
8
Selector
INTST0,
INTST1
TMx output
f
XX
to f
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