upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 481

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Capture/compare register n0 --------------------------- 156
Capture/compare register n1 --------------------------- 157
Cascade connection (16-bit timer) mode ------------ 205
Cautions on power save function----------------------- 151
CG --------------------------------------------------------------- 36
Channel control block ------------------------------------- 331
CLKOUT ------------------------------------------------------- 53
Clock generation function -------------------------------- 138
Clock generator (CG) --------------------------------------- 36
Clock output function ------------------------------------- 139
Clock selector ----------------------------------------------- 231
Command register ------------------------------------------- 88
Communication command ------------------------------- 411
Communication operation -------------------------------- 277
Communication reservation ----------------------------- 273
Communication system ---------------------------------- 404
Conversion time--------------------------------------------- 329
CPU ------------------------------------------------------------- 35
CPU address space ----------------------------------------- 66
CPU register set --------------------------------------------- 60
CR00, CR10 ------------------------------------------------ 156
CR01, CR11 ------------------------------------------------ 156
CR20 to CR50 ---------------------------------------------- 191
CR23 ---------------------------------------------------------- 205
CR45 ---------------------------------------------------------- 205
CRC0, CRC1 ----------------------------------------------- 160
CSI0 to CSI2 ------------------------------------------------ 223
CSIC0 to CSIC2 ------------------------------------------- 124
CSIM0 to CSIM2 ------------------------------------------- 223
CSIS0 to CSIS2 -------------------------------------------- 223
[D]
Data communication timing ------------------------------ 279
Data hold time correction circuit ------------------------ 232
Data space ----------------------------------------- 68, 79, 105
Data wait control register ---------------------------------- 93
DBC0 to DBC2 --------------------------------------------- 335
DCHC0 to DCHC2 ----------------------------------------- 336
DIOA0 to DIOA2 ------------------------------------------- 332
Differential linearity error---------------------------------- 328
DMA functions ---------------------------------------------- 330
DMA byte count registers 0 to 2 ----------------------- 335
DMA channel control registers 0 to 2 ----------------- 336
DMA internal RAM address registers 0 to 2 -------- 332
DMA peripheral I/O address registers 0 to 2 -------- 332
DMA transfer request control block -------------------- 331
DMAIC0 to DMAIC2 -------------------------------------- 124
DRA0 to DRA2 --------------------------------------------- 332
DSTB ----------------------------------------------------------- 50
User’s Manual U12768EJ4V1UD
APPENDIX D INDEX
DWC ------------------------------------------------------------ 93
[E]
ECR ------------------------------------------------------------- 62
Edge detection function of external interrupt request
EGN0 --------------------------------------------------- 114, 351
EGP0 --------------------------------------------------- 114, 351
EIPC ------------------------------------------------------------ 62
EIPSW --------------------------------------------------------- 62
Electrical specifications------------------------------------434
EP flag ---------------------------------------------------------129
Erase unit -----------------------------------------------------398
Error detection ----------------------------------------------270
Exception trap -----------------------------------------------129
Extension code ---------------------------------------------270
External event counter ----------------------------- 176, 200
External expansion mode --------------------------------- 77
External memory area ------------------------------------- 75
External wait function -------------------------------------- 94
[F]
Falling edge specification register 0------------- 114, 351
FEPC ----------------------------------------------------------- 62
FEPSW -------------------------------------------------------- 62
Flash information--------------------------------------------421
Flash memory -----------------------------------------------398
Flash memory control -------------------------------------410
Flash memory programming by self-programming -413
Flash memory programming mode ---------------65, 410
Flash programming mode control register ------------423
Flow of acquiring flash information ---------------------431
Flow of erasing flash memory----------------------------428
FLPMC---------------------------------------------------------423
Full-scale error-----------------------------------------------328
Function block configuration ------------------------------ 34
[G]
General-purpose register ---------------------------------- 61
[H]
Halfword access --------------------------------------------- 91
HALT mode --------------------------------------------------144
Hardware environment
Hardware start --------------------------------------- 308, 320
HLDAK --------------------------------------------------------- 51
HLDRQ -------------------------------------------------------- 51
How to read A/D converter characteristic table------326
input pin ----------------------------------------------------114
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