upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 171

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(2) Measurement of two pulse widths with free running counter
TMCn
CRCn
Figure 7-9. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
The pulse widths of the two signals respectively input to the TIn0 and TIn1 pins can be measured when 16-bit
timer register n (TMn) is used as a free-running counter (refer to Figure 7-9).
When the edge specified by bits 4 and 5 (ESn00 and ESn01) of prescaler mode register n (PRMn) is input to the
TIn0 pin, the value of TMn is loaded to 16-bit capture/compare register n1 (CRn1) and an external interrupt
request signal (INTTMn1) is set.
When the edge specified by bits 6 and 7 (ESn10 and ESn11) in PRMn is input to the TIn1 pin, the value of TMn is
loaded to 16-bit capture/compare register n0 (CRn0), and an external interrupt request signal (INTTMn0) is set.
The edges of the TIn0 and TIn1 pins are specified by bits 4 and 5 (ESn00 and ESn01) and bits 6 and 7 (ESn10
and ESn11) of PRMn0, respectively. The rising, falling, or both rising and falling edges can be specified.
The valid edge is detected by sampling at the count clock cycle selected by prescaler mode register n, n1 (PRMn,
PRMn1), and a capture operation is not performed until the valid level is detected two times. Therefore, noise
with a short pulse width can be eliminated.
Remark
Remark
0
0
n = 0, 1
0/1: When these bits are reset to 0 or set to 1, other functions can be used along with the pulse
width measurement function.
registers 0, 1 (TMC0, TMC1) and 7.1.4 (2) Capture/compare control registers 0, 1 (CRC0,
CRC1).
0
0
(a) 16-bit timer mode control registers 0, 1 (TMC0, TMC1)
(b) Capture/compare control registers 0, 1 (CRC0, CRC1)
0
0
CHAPTER 7 TIMER/COUNTER FUNCTION
User’s Manual U12768EJ4V1UD
0
0
TMCn3
For details, refer to 7.1.4 (1) 16-bit timer mode control
0
0
TMCn2
CRCn2
1
1
TMCn1
CRCn1
0/1
0
CRCn0
OVFn
0
1
Free-running mode
CRn0 used as capture
register
Captures valid edge of
TIn1 pin to CRn0.
CRn1 used as capture
register
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