uja1061 NXP Semiconductors, uja1061 Datasheet - Page 16
uja1061
Manufacturer Part Number
uja1061
Description
Low Speed Can/lin System Basis Chip
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1061.pdf
(74 pages)
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NXP Semiconductors
UJA1061_5
Product data sheet
Pin RSTN is monitored for a continuously clamped LOW situation. Once the SBC pulls pin
RSTN HIGH but pin RSTN level remains LOW for longer than t
immediately enters Fail-safe mode since this indicates an application failure.
Fig 6. Reset pin behavior
Fig 7. Reset timing diagram
V
RSTN
V1
power-up
V
V
RSTN
RSTN
t
RSTNL
Rev. 05 — 22 November 2007
forced LOW
externally
RSTN
voltage
under-
RSTN externally forced LOW
t
RSTNL
t
t
RSTNL
RSTNL
Fault-tolerant CAN/LIN fail-safe system basis chip
watchdog
missing
access
t
RSTNL
voltage
under-
spike
t
WD(init)
t
WD(init)
RSTN(CLT)
© NXP B.V. 2007 Nov 23. All rights reserved.
001aad181
time
time
UJA1061
power-
down
, the SBC
V
V
rel(UV)(V1)
det(UV)(V1)
coa054
time
time
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