uja1061 NXP Semiconductors, uja1061 Datasheet - Page 37

• Manufacturer Part Number: uja1061
• Description: Low Speed Can/lin System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 12.
[1]
[2]
UJA1061_5
Product data sheet
Bit
15 and 14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
For the CAN transceiver to enter Off-Line mode from On-line or On-line Listen mode a minimum time without bus activity is needed. This
minimum time t
In case of an RXDC / TXDC interfacing failure the CAN transmitter is disabled without setting CTC. Recovery from such a failure is
automatic when CAN communication (with correct interfacing levels) is received. Manual recovery is also possible by setting and
clearing the CTC bit under software control.
Physical Layer Control register and Physical Layer Control Feedback register bit description
Symbol
A1, A0
RRS
RO
V2C
CPNC
COTC
CTC
CRC
CMC
-
LMC
LSC
LDC
LWEN
LTC
6.13.9 Physical Layer Control register and Physical Layer Control Feedback
off-line
is defined by COTC; see
register
These registers allow configuration of the CAN transceiver and LIN transceiver of the SBC
and allow the settings to be read back.
Description
register address
Read Register Select
Read Only
V2 Control
CAN Partial Networking
Control
CAN Off-line Time
Control
CAN Transmitter
Control
CAN Receiver Control
CAN Mode Control
reserved
LIN Mode Control
LIN Slope Control
LIN Driver Control
LIN Wake-up Enable
LIN Transmitter
Control
[1]
[2]
[3]
Section
Rev. 05 — 22 November 2007
6.7.1.4.
Value
11
1
0
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
Function
select Physical Layer Control register
read the General Purpose Feedback register 1
read the Physical Layer Control Feedback register
read the register selected by RRS without writing to the
Physical Layer Control register
read the register selected by RRS and write to Physical
Layer Control register
V2 is OFF in CAN Off-line mode
V2 remains active in CAN Off-line mode
CAN transceiver enters On-line Listen mode instead of
On-line mode; cleared whenever the SBC enters On-line
mode or Active mode
On-line Listen mode disabled
t
t
CAN transmitter is disabled
CAN transmitter is enabled
TXD signal is forwarded directly to RXD for self-test
purposes (loopback behavior); only if CTC = 1
TXD signal is not forwarded to RXD (normal behavior)
CAN Active mode (in Normal mode and Flash mode only)
CAN Active mode disabled
reserved for future use; should remain cleared to ensure
compatibility with future functions which might use this bit
LIN Active mode (in Normal mode and Flash mode only)
LIN Active mode disabled
up to 10.4 kbit/s (low slope)
up to 20 kbit/s (normal)
increased LIN driver current capability
LIN driver in conformance with the LIN 2.0 standard
Wake-up via the LIN-bus enabled
Wake-up via the LIN-bus disabled
LIN transmitter is disabled
LIN transmitter is enabled
Fault-tolerant CAN/LIN fail-safe system basis chip
off-line
off-line
long period (extended to t
short period (extended to t
off-line(ext)
off-line(ext)
© NXP B.V. 2007 Nov 23. All rights reserved.
UJA1061
after wake-up)
after wake-up)
37 of 74