uja1061 NXP Semiconductors, uja1061 Datasheet - Page 32

• Manufacturer Part Number: uja1061
• Description: Low Speed Can/lin System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 7.
[1]
Table 8.
UJA1061_5
Product data sheet
Bit
0
Bit
15 and 14
13
12
11
10 to 7
6 and 5
4
1
The RSS bits are updated with each reset event and not cleared. The last reset event is captured.
System Status register bit description (Continued)
System Diagnosis register bit description
Symbol
ENS
PWONS
Symbol
A1, A0
RRS
RO
GSD
CANFD
[3:0]
LINFD[1:0]
V3D
6.13.5 System Diagnosis register
This register allows diagnosis information to be read back from the SBC. This register can
be read in all modes.
Description
Enable status
Power-on reset Status
Description
register address
Read Register Select
Read Only
Ground Shift Diagnosis
CAN failure diagnosis
LIN failure diagnosis
V3 diagnosis
Rev. 05 — 22 November 2007
Value
1
0
1
0
Value
00
1
1
0
1
0
1111
1110
1100
1101
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
11
10
01
00
1
0
Function
pin EN output activated (V1-related HIGH level)
pin EN output released (LOW level)
power-on reset; cleared after a successfully entered
Normal mode
no power-on reset
Function
read System Diagnosis register
read System Diagnosis register without writing to Mode
register
read System Diagnosis register and write to Mode register
system GND shift is outside selected threshold
system GND shift is within selected threshold
TXDC is clamped dominant
RXDC is clamped dominant
BUS is clamped dominant (dual failure situation)
RXDC is clamped recessive
BUS is clamped recessive (dual failure situation)
reserved
CANH is shorted to CANL (failure case 7)
CANL is shorted to V
CANL is shorted to VBAT (failure case 6)
CANH is shorted to GND (failure case 5)
CANL is shorted to GND (failure case 4)
CANH is shorted to V
CANH is shorted to VBAT (failure case 3)
CANL wire is interrupted (failure case 2)
CANH wire is interrupted (failure case 1)
no failure
TXDL is clamped dominant
LIN is shorted to GND (dominant clamped)
LIN is shorted to VBAT (recessive clamped)
no failure
OK
fail; V3 is disabled due to an overload situation
Fault-tolerant CAN/LIN fail-safe system basis chip
CC
CC
(failure case 6a)
(failure case 3a)
© NXP B.V. 2007 Nov 23. All rights reserved.
UJA1061
32 of 74