uja1061 NXP Semiconductors, uja1061 Datasheet - Page 23

• Manufacturer Part Number: uja1061
• Description: Low Speed Can/lin System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
UJA1061_5
Product data sheet
6.8.1.1 Active mode
6.8.1.2 Off-line mode
6.8.2 LIN wake-up
6.8.3 Termination control
The controller of the LIN transceiver provides two modes of operation: Active mode and
Off-line mode; see
current, but wake-up events will be recognized by the separate wake-up receiver.
In Active mode the LIN transceiver can transmit data to and receive data from the LIN bus.
To enter Active mode the LMC bit must be set in the Physical Layer Control register and
the SBC must be in Normal mode or Flash mode.
The LTC bit can be used to set the LIN transceiver to a Listen-only mode. The transmitter
output stage is disabled in this mode.
When leaving Active mode the LIN transmitter is disabled and the LIN receiver is
monitoring the LIN-bus for a valid wake-up.
Off-line mode is the low power mode of the LIN transceiver. The LIN transceiver is
disabled to save supply current. Pin RXDL reflects any wake-up event at the LIN-bus.
For a remote wake-up via LIN a LIN-bus signal is required as shown in
The RTLIN pin is in one of 3 different states: RTLIN = on, RTLIN = off or RTLIN = 75 A;
see
During Active mode, with no short-circuit between the LIN-bus and GND, pin RTLIN
provides an internal switch to BAT42. For master and slave operation an external resistor,
1 k or 30 k respectively, can be applied between pins RTLIN and LIN. An external
diode in series with the termination resistor is not required due to the incorporated internal
diode.
Fig 10. LIN wake-up timing diagram
Figure
11.
Figure
Rev. 05 — 22 November 2007
wake-up
LIN
9. In Off-line mode the transmitter and receiver do not consume
Fault-tolerant CAN/LIN fail-safe system basis chip
t BUS(LIN)
001aad447
© NXP B.V. 2007 Nov 23. All rights reserved.
UJA1061
Figure
10.
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