hyb18t512160af-5 Infineon Technologies Corporation, hyb18t512160af-5 Datasheet - Page 100

• Manufacturer Part Number: hyb18t512160af-5
• Description: 512-mbit Ddr2 Sdram
• Manufacturer: Infineon Technologies Corporation

11) MIN (
12) The
13) The Auto-Refresh command interval has be reduced to 3.9 µs when operating the DDR2 DRAM in a temperature range
14) 0 ≤
15) 85 °C <
16) x4 & x8 (1k page size)
17) The
18) x16 (2k page size), not on 256Mbit component
19) The maximum limit for the
20) Minimum
21) User can choose two different active power-down modes for additional power saving via MRS address bit A12. In “standard
Data Sheet
this value can be greater than the minimum specification limits for
no longer driving (
as valid data transitions.These parameters are verified by design and characterization, but not subject to production test.
between 85 °C and 95 °C.
but system performance (bus turnaround) degrades accordingly.
active power-down mode” (MR, A12 = “0”) a fast power-down exit timing
mode” (MR, A12 =”1”) a slow power-down exit timing
T
t
t
HZ
CASE
RRD
t
CL
,
,
T
t
RPST
timing parameter depends on the page size of the DRAM organization. See Chapter 1.5
t
CASE
t
≤ 85 °C
CH
WTR
) refers to the smaller of the actual clock low time and the actual clock high time as provided to the device (i.e.
and
≤ 95 °C
is two clocks when operating the DDR2-SDRAM at frequencies ≤ 200 ΜΗz.
t
t
HZ
LZ
,
,
t
t
RPRE
RPST
t
WPST
), or begins driving (
parameters are referenced to a specific voltage level, which specify when the device output is
parameter is not a device limit. The device operates with a greater value for this parameter,
t
LZ
,
t
RPRE
t
XARDS
).
100
t
HZ
has to be satisfied.
and
t
t
LZ
CL
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
transitions occur in the same access time windows
and
t
XARD
t
CH
).
can be used. In “low active power-down
512-Mbit DDR2 SDRAM
Electrical Characteristics
09112003-SDM9-IQ3P
Rev. 1.3, 2005-01