PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 450

• Manufacturer Part Number: PIC32MX460F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
FIGURE 20-6:
20.2.16
PMCS2 and PMCS1 Chip Select pins share functional-
ity with address lines A15 and A14. It is possible to
enable both PMCS2 and PMCS1 as Chip Selects, or
enable only PMCS2 as a Chip Select, allowing PMCS1
to function strictly as address line A14. It is not possible
to enable only PMCS1.
FIGURE 20-7:
DS61143C -page 448
0xFFFF
0xC000
0x8000
0x4000
0x0000
PIC32MX3XX/4XX
Fully Multiplexed Address/Data Bus
Control Lines
ADRMUX<1:0> =
Note 1: PMA15 is not available if PMCS2 is enabled.
PMA14 is not available if PMCS1 is enabled.
2 - Chip Selects
2 - 16K Address Ranges
Both Devices
ADDRESSING CONSIDERATIONS
PMCS2 = 1
PMCS1 = 1
(INVALID)
No Device
Device 2
Selected
Device 1
Selected
Selected
Selected
11
FULL MULTIPLEXED
ADDRESSING
(16-BIT BUS)
PMP CHIP SELECT ADDRESS MAPPING (DEMULTIPLEXED AND PARTIAL
MULTIPLEXED MODES)
PMCS2, CS1
0
0
1
1
1
0
1
0
PMD<7:0>
PMD<15:8>
PMA14/PMCS1
PMA15/PMCS2
PMA1 / PMALH
PMRD
PMWR
PMA0 / PMALL
1 - Chip Select
1 - 32K Address Range
(1)
PMCS2 = 1
No Device
Selected
Selected
Preliminary
Device
PMCS2, A14
When configured as Chip Selects, a 1 must be written
into bit position 15 or 14 of the PMADDR register in
order for PMCS2 or PMCS1 to become active during a
read or write operation. Failing to write a 1 to PMCS2
or PMCS1 does not prevent address pins PMA<13:0>
from being active as the specified address appears,
however, no Chip Select signal will be active.
Disabling one or both Chip Selects PMCS2 and
PMCS1 makes these pins available as address lines
A15 and A14.
In
PMADDR<15:0> are multiplexed with the data bus and
in the event address bits PMA15 or PMA14 are config-
ured
PMADDR<15:14> address bits are automatically
forced = 0. Disabling one or both PMCS2 and PMCS1
makes
PMADDR<15:14>.
In any of the Master mode multiplexing schemes, dis-
abling both Chip Select pins PMCS2 and PMCS1
requires the user to provide Chip Select line control
through some other I/O pin under software control. See
Figure 20-7.
0
1
1
0
Note:
Full
0
1
0
1
as
these
When using Auto-Increment Address
mode, PMCS2 and PMCS1 do not partic-
ipate and must be controlled by the user’s
software
PMADDR<15:14> explicitly.
Multiplexed
Chip
bits
IO-pin = Software controlled CS
1 - 64K Address Range
IOpin = 1
Selected
Selects,
Device
available
© 2008 Microchip Technology Inc.
by
mode,
writing
the
as
A15, A14, IO-pin
1
0
1
0
address
corresponding
address
to
0
1
1
0
‘1’
1
1
1
1
bits
bits
to