PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 460

• Manufacturer Part Number: PIC32MX460F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
EXAMPLE 20-7:
EXAMPLE 20-8:
DS61143C -page 458
/*
*/
/*
*/
void _IRQ(_PMP_VECTOR, ipl3) PMP_Interrupt_ISR(void)
{
}
The following code example illustrates a PMP interrupt configuration.
When the PMP interrupt is generated, the CPU will branch to the vector
assigned to PMP interrupt.
// Configure PMP for desired mode of operation
...
// Configure the PMP interrupts
IPC7SET = 0x0014;
IPC7SET = 0x0003;
IFS1CLR
IEC1SET
PMCONSET = 0x8000;
The following code example demonstrates a simple interrupt
service routine for PMP interrupts. The user’s code at this
vector should perform any application specific operations and must
clear the PMP interrupt status flag before exiting.
... perform application specific operations in response to the interrupt
IFS1CLR
= 0x0002;
= 0x0002;
= 0x00002;
PMP MODULE INTERRUPT INITIALIZATION
PMP ISR
// Set priority level=5
// Set subpriority level=3
// Could have also done this in single
// operation by assigning IPC7SET = 0x0017
// Clear the PMP interrupt status flag
// Enable PMP interrupts
// Enable PMP module
// Be sure to clear the PMP interrupt status
// flag before exiting the service routine.
Preliminary
© 2008 Microchip Technology Inc.