PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 506

IC PIC MCU FLASH 512K 100-TQFP

PIC32MX460F512L-80I/PT

Manufacturer Part Number
PIC32MX460F512L-80I/PT
Description
IC PIC MCU FLASH 512K 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
85
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
6
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
PIC32MX3XX/4XX
22.4.10 Free-Running Sample
The
(SSRC = 111) in combination with the Automatic Sam-
pling Start mode (ASAM = 1), allows the ADC module
to schedule acquisition/conversion sequences with no
intervention by the user or other device resources. This
“Clocked” mode allows continuous data collection after
module initialization. See Example 22-3 for a code
example.
EXAMPLE 22-3:
22.4.11
In this case, one ADC input, AN0, will be acquired and
converted. The results are stored in the ADC1BUF buf-
fer. This process repeats 15 times until the buffer is full,
and then the module generates an interrupt. Then
entire process repeats.
With ALTS (AD1CON2<0>) clear, only the MUX A
inputs are active. The CH0SA (AD1CHS<19:16>) bits
and CH0NA (AD1CHS<23>) bit are specified (AN0-
VREF-) as the input to the sample/hold channel. Other
input selection bits are not used.
22.4.12
A typical setup might include all available analog input
channels to be sampled and converted. The CSCNA
(AD1CON2<10>) bit specifies scanning of the ADC
DS61143C-page 504
AD1PCFG = 0xFFFB;
AD1CON1 = 0x00E0;
AD1CHS
AD1CSSL = 0;
AD1CON3 = 0x0F00;
AD1CON2 = 0x0004;
AD1CON1SET = 0x8000;
AD1CON1SET = 0x0004;
while (1)
{ IFS1CLR = 0x0002;
while (!IFS1 & 0x0002);
Auto-Convert
= 0x00020000;
Conversion Sequence
SAMPLING A SINGLE CHANNEL
MULTIPLE TIMES
EXAMPLE: A/D CONVERSIONS
WHILE SCANNING THROUGH
ANALOG INPUTS
CONVERTING 1 CHANNEL, AUTO-SAMPLE START, AUTO-CONVERT CODE
Conversion
Trigger
// all PORTB = Digital; RB2 = analog
// SSRC bit = 111 internal
// counter ends sampling and starts
// converting.
// Connect RB2/AN2 as CH0 input
// in this example RB2/AN2 is the input
// Sample time = 15Tad
// Interrupt after every 2 samples
// turn ADC ON
// auto start sampling
// repeat continuously
// clear ADC interrupt flag
// poll for conversion done\
// result of conversions is available in ADC1BUF0
// and ADC1BUF1
mode
Preliminary
// for 31Tad then go to conversion
inputs. Other conditions are similar to the previous
example (see Section 22.4.11 “Sampling a Single
Channel Multiple Times”).
Initially, the AN0 input is acquired and converted. The
result is stored in the ADC1BUF buffer. Then the AN1
input is acquired and converted. This process of scan-
ning the inputs repeats 16 times until the buffer is full
and then the module generates an interrupt. Then the
entire process repeats.
22.4.12.1
To enable the dual 8-word buffers and alternating the
buffer fill, set the BUFM (AD1CON2<1>) bit. The BUFM
setting does not affect other operational parameters.
First, the conversion sequence starts filling the buffer at
ADC1BUF0 (buffer location 0 x 0). After the first inter-
rupt occurs, the buffer begins to fill at ADC1BUF8 (buf-
fer location 0 x 8). The BUFS (AD1CON2<7>) bit is
alternately set and cleared after each interrupt to show
which buffer is being filled. In this example, three ana-
log inputs are sampled and an interrupt occurs after
every third sample.
Example: Using Dual 8-Word Buffers
..
© 2008 Microchip Technology Inc.

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