PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 574

• Manufacturer Part Number: PIC32MX460F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
28.2.1.5
The JTAG interface can also be used to program
PIC32MX3XX/4XX devices in their target applications.
Using EJTAG with the JTAG interface allows application
designers to include a dedicated test and programming
port into their applications, with a single 4-pin interface,
without imposing the circuit constraints that the ICSP
interface may require.
28.2.1.6
Enhanced EJTAG programming uses the standard
JTAG interface but uses a programming executive writ-
ten to RAM. Use of the programming executive with the
JTAG interface provides a significant improvement in
programming speed.
28.2.2
28.2.2.1
ICSP also provides a hardware channel for the In-Cir-
cuit Debugger (ICD) which allows externally controlled
debugging of software. Using the appropriate hardware
interface and software environment, users can force
the device to single step through its code, track the
actual content of multiple registers and set software
breakpoints.
The active ICSP debugger port is selected by the ICS
Configuration bit.
28.2.2.2
The industry standard EJTAG interface allows third
party EJTAG tools to be used for debugging. Using the
EJTAG interface, memory and registers can be viewed
and modified. Breakpoints can be set and the program
execution may be stopped, started or single stepped.
28.2.3
To aid in debugging applications certain I/O peripherals
have a user-controllable bit to override the Freeze func-
tion in the peripheral. This allows the module to
continue to send any data, buffered within the periph-
eral, even when a debugger attempts to halt the periph-
eral. The Debug mode control bits for these peripherals
are contained in the DDPCON register.
28.2.4
The JTAG boundary scan method is the process of
adding a Shift register stage adjacent to each of the
component’s I/O pins. This permits signals at the com-
ponent boundaries to be controlled and observed,
using a defined set of scan test principles. An external
tester or controller provides instructions and reads the
results in a serial fashion.
DS61143B-page 572
DEBUGGING
SPECIAL DEBUG MODES FOR
SELECT COMMUNICATIONS
PERIPHERALS
JTAG BOUNDARY SCAN
EJTAG Device Programming Using
the JTAG Interface
Enhanced EJTAG Programming
Using the JTAG Interface
ICSP and In-Circuit Debugging
EJTAG Debugging
Preliminary
The external device also provides common clock and
control signals. Depending on the implementation,
access to all test signals is provided through a
standardized, 4-pin interface.
A typical application incorporating the JTAG boundary
scan interface is shown in Figure 28-3. In this example,
a PIC32MX3XX/4XX microcontroller is daisy-chained
to a second JTAG compliant device. Note that the TDI
line from the external tester supplies data to the TDI pin
of the first device in the chain (in this case, the micro-
controller). The resulting test data for this two-device
chain is provided from the TDO pin of the second
device to the TDO line of the tester.
This section describes the JTAG module and its gen-
eral use. Users interested in using the JTAG interface
for device programming should refer to the appropriate
PIC32MX3XX/4XX device programming specification
for more information.
© 2008 Microchip Technology Inc.