PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 89

• Manufacturer Part Number: PIC32MX460F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.2.4
A Watchdog Timer time-out causes the device Reset,
SYSRST, to be asserted asynchronously. Note that a
WDT time-out during SLEEP or IDLE mode will wake-up
the processor and branch to the PIC32MX3XX/4XX
Reset vector, but not reset the processor. The only bits
affected are WDTO and the SLEEP or IDLE bits in the
RCON register. For more information, refer to Section
26.0 “Watchdog Timer”.
5.2.5
PIC32MX3XX/4XX devices have a simple brown-out
capability. If the voltage supplied to the regulator is inad-
equate to maintain a regulated level, the regulator Reset
circuitry will generate a Brown-out Reset. This event is
captured by the BOR flag bit (RCON<1>). Refer to
Section 30.2 “AC Characteristics and Timing Param-
eters” for further details.
5.2.6
To maintain the integrity of the stored configuration val-
ues, all device Configuration bits are implemented as a
complementary set of register bits. For each bit, as the
actual value of the register is written as ‘1’, a comple-
mentary value, ‘0’, is stored into its corresponding
background register and vice versa. The bit pairs are
compared every time, including Sleep mode. During
this comparison, if the Configuration bit values are not
found opposite to each other, a Configuration Mismatch
event is generated which causes a device Reset.
If a device Reset occurs as a result of a Configuration
Mismatch, the CM bit (RCON<9>) is set.
© 2008 Microchip Technology Inc.
Note:
WATCHDOG TIMER TIME-OUT
RESET (WDTR)
In this document, a distinction is made
between a power mode as it is used in a
specific module, and a power mode as it is
used by the device, e.g., Sleep mode of the
comparator and SLEEP mode of the CPU.
To indicate which type of power mode is
intended, uppercase and lowercase letters
(Sleep, Idle, Debug) signify a module
power mode, and all uppercase letters
(SLEEP, IDLE, DEBUG) signify a device
power mode.
BROWN-OUT RESET (BOR)
CONFIGURATION MISMATCH
RESET
Preliminary
5.3
5.3.1
Most of the Special Function Registers (SFRs) associ-
ated with the PIC32MX3XX/4XX CPU and peripherals
are reset to a particular value at a device Reset. Refer
to the corresponding data sheet section for a periph-
eral’s SFR details. The Reset value for each SFR will
depend on the type of Reset.
5.3.2
All Reset conditions force the Flash Configuration
Word registers to be re-loaded. However, a POR forces
Flash Configuration Word registers to be reset prior to
being reloaded. For all other Reset conditions, the
Flash Configuration Word registers are not reset prior
to being re-loaded. This difference accommodates
MCLR assertions during Debug mode without affecting
the state of the debug operations.
PIC32MX3XX/4XX
Reset States
SPECIAL FUNCTION REGISTER
RESET STATES
CONFIGURATION WORD
REGISTER RESET STATES
DS61143C-page 87