PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 457

IC PIC MCU FLASH 512K 100-TQFP

PIC32MX460F512L-80I/PT

Manufacturer Part Number
PIC32MX460F512L-80I/PT
Description
IC PIC MCU FLASH 512K 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
85
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
6
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
Price
Part Number:
PIC32MX460F512L-80I/PT
Manufacturer:
VISHAY
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3 200
Part Number:
PIC32MX460F512L-80I/PT
Manufacturer:
Microchip Technology
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Part Number:
PIC32MX460F512L-80I/PT
0
20.3.11
Buffered Parallel Slave Port mode is functionally iden-
tical to the Legacy Parallel Slave Port mode with one
exception: the implementation of 4-level read and write
buffers. Buffered Slave mode is enabled by setting the
PMMODE<INCM1:INCM0> bits to ‘11’.
FIGURE 20-9:
20.3.12
The Buffered Slave mode configuration is determined
automatically and dedicated to the PMP module when
the Buffered Slave mode is selected. The user only
need to configure the polarity of the PMCS1, PMRD
and PMWR signals.
The following example illustrates which control bits are
to be set for Buffered Slave mode configuration:
• Configure Buffered Slave mode bits -
• Select PMRD “active-low” pin polarity -
• Select PMWR “active-low” pin polarity -
• Select PMCS2, PMCS1 “active-low” pin polarity -
20.3.13
The Buffered Slave mode initialization properly
prepares the PSP port for communicating with an
external master device.
The following steps should be performed to properly
configure the PSP port:
1.
2.
© 2008 Microchip Technology Inc.
INCM<1:0> (PMMODE<12:11>) = 11.
MODE<1:0> (PMMODE<9:8>) = 00 and
RDSP (PMCON<0>) = 0.
WRSP (PMCON<1>) = 0.
CS2P (PMCON<4>) = 0 and CS1P
(PMCON<3>) = 0.
If interrupts are used, disable the PMP interrupt
by clearing the interrupt enable bit PMPIE
(IEC1<2>) = 0.
Stop and reset the PMP module by clearing the
control bit ON (PMCON<15>) = 0.
Master
Buffered Slave Mode
BUFFERED SLAVE
CONFIGURATION
BUFFERED SLAVE MODE
INITIALIZATION
D
<
7:0>
WR
RD
CS
PARALLEL MASTER/SLAVE CONNECTION BUFFERED
Preliminary
PMD<7:0>
PMCS1
PMRD
PMWR
When the Buffered mode is active, the module uses the
PMDIN register as write buffers and the PMDOUT reg-
ister as read buffers, with respect to the master device.
Each register is divided into four 8-bit buffer registers,
four read buffers in PMDOUT and four write buffers in
PMDIN. Buffers are numbered 0 through 3, starting
with the lower byte <7:0> and progressing upward
through the high byte <31:24>.
3.
4.
5.
Configure the desired settings in the PMCON
and PMMODE control registers.
If interrupts are used:
a)
b)
c)
Enable the PMP slave port by setting control bit
ON = 1.
Address
Pointer
Write
PIC32MX3XX/4XX
Clear interrupt flag bit PMPIF
(IFS1<2>) = 0.
Configure the PMP interrupt priority bits
PMPIP<2:0> (IPC7<4:2>) and interrupt sub
priority bits PMPIS (IPC7<1:0>.
Enable PSP interrupt by setting interrupt
enable bit PMPIE = 1.
PIC32MX3XX/4XX Slave
PMDOUT (0)
PMDOUT (1)
PMDOUT (2)
PMDOUT (3)
Address
Pointer
Read
DS61143C-page 455
PMDIN (0)
PMDIN (1)
PMDIN (2)
PMDIN (3)

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