MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 100
![IC MCU 25MHZ ETHERNT/PHY 112LQFP](/photos/12/20/122046/mc9s12ne64cpv_sml.jpg)
MC9S12NE64CPV
Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12NE64VTU.pdf
(554 pages)
Specifications of MC9S12NE64CPV
Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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Chapter 2 64 Kbyte Flash Module (S12FTS64KV3)
2.5
2.5.1
If a command is active (CCIF = 0) when the MCU enters wait mode, the active command and any buffered
command will be completed.
The Flash module can recover the MCU from wait mode if the CBEIF and CCIF interrupts are enabled
(Section 2.8,
2.5.2
If a command is active (CCIF = 0) when the MCU enters stop mode, the operation will be aborted and, if
the operation is program or erase, the Flash array data being programmed or erased may be corrupted and
the CCIF and ACCERR flags will be set. If active, the high voltage circuitry to the Flash memory will
immediately be switched off when entering stop mode. Upon exit from stop mode, the CBEIF flag is set
and any buffered command will not be launched. The ACCERR flag must be cleared before starting a
command write sequence (see
2.5.3
In background debug mode (BDM), the FPROT register is writable. If the MCU is unsecured, then all
Flash commands listed in
2.6
The Flash module provides the necessary security information to the MCU. After each reset, the Flash
module determines the security state of the MCU as defined in
(FSEC)”.
The contents of the Flash security byte at 0xFF0F in the Flash configuration field must be changed directly
by programming 0xFF0F when the MCU is unsecured and the higher address sector is unprotected. If the
Flash security byte remains in a secured state, any reset will cause the MCU to initialize to a secure
operating mode.
2.6.1
The MCU may be unsecured by using the backdoor key access feature which requires knowledge of the
contents of the backdoor keys (four 16-bit words programmed at addresses 0xFF00–0xFF07). If the
KEYEN[1:0] bits are in the enabled state (see
100
Operating Modes
Flash Module Security
Wait Mode
Stop Mode
Background Debug Mode
Unsecuring the MCU using Backdoor Key Access
“Interrupts”).
As active commands are immediately aborted when the MCU enters stop
mode, it is strongly recommended that the user does not use the STOP
instruction during program or erase operations.
Table 2-18
Section 2.4.1.2, “Command Write
can be executed.
MC9S12NE64 Data Sheet, Rev. 1.1
Section 2.3.2.2, “Flash Security Register
NOTE
Section 2.3.2.2, “Flash Security Register
Sequence”).
Freescale Semiconductor
(FSEC)”) and the
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