MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 365
![IC MCU 25MHZ ETHERNT/PHY 112LQFP](/photos/12/20/122046/mc9s12ne64cpv_sml.jpg)
MC9S12NE64CPV
Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12NE64VTU.pdf
(554 pages)
Specifications of MC9S12NE64CPV
Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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ACKR — Acknowledge Bit Received
PGR — Page Received
LKC — Link Changed
ANC — Auto-Negotiation Changed
PDF — Parallel Detect Fault
RMTF — Remote Fault
JABI — Jabber Interrupt
12.3.4.2 Proprietary Status Register
MII Register Address 17 (%10001)
Read: Anytime
Write:
Freescale Semiconductor
RESET:
W
R
1 = Acknowledge bit has been received from the link partner
0 = Acknowledge bit has not been received since the last access of this register. (ACK bit 14 of the
1 = A new page has been received from the link partner
0 = A new page has not been received from the link partner since the last access of this register (Bit
1 = The link status has changed since the last access of this register
0 = The link status has not changed since the last access of this register. (LNK bit 14 of the
1 = The auto-negotiation status has changed since the last access of this register
0 = The auto-negotiation status has not changed since the last access of this register
1 = A parallel-detect fault has occurred since the last access of this register
0 = A parallel-detect fault has not been detected since the last access of this register. (Bit 4 was set
1 = A remote fault condition has been detected since the last access of this register
0 = A remote fault condition has not been detected since the last access of this register. (RMTF bit 4
1 = A jabber condition has been detected since the last access of this register
0 = A jabber condition has not been detected since the last access of this register (JABD bit 1 of the
15
auto-negotiation link partner ability register was set by receipt of link code word)
1 was set by a page received event)
proprietary status register was changed)
by rising edge of parallel detection fault)
of the status register was set by rising edge of a remote fault)
status register was set by rising edge of jabber condition)
0
0
= Unimplemented or Reserved
LNK
14
1
DPMD
13
1
SPD
12
1
Figure 12-16. Proprietary Status Register
11
0
0
MC9S12NE64 Data Sheet, Rev. 1.1
ANNC PRCVD
10
0
9
0
MODE
ANC
(1)
8
7
0
0
6
0
0
PLR
5
0
Memory Map and Register Descriptions
4
0
0
3
0
0
2
0
0
1
0
0
0
0
0
365
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