MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 145
![IC MCU 25MHZ ETHERNT/PHY 112LQFP](/photos/12/20/122046/mc9s12ne64cpv_sml.jpg)
MC9S12NE64CPV
Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12NE64VTU.pdf
(554 pages)
Specifications of MC9S12NE64CPV
Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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4.3.2
This section describes in address order all the CRGV4 registers and their individual bits.
Freescale Semiconductor
CRGFLG
FORBYP
Register
COPCTL
CRGINT
CLKSEL
PLLCTL
RTICTL
REFDV
CTFLG
CTCTL
SYNR
Name
Register Descriptions
Register address = base address + address offset, where the base address is
defined at the MCU level and the address offset is defined at the module
level.
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
PLLSEL
WCOP
Bit 7
RTIF
RTIE
CME
0
0
0
0
0
0
= Unimplemented or Reserved
RSBCK
PLLON
PORF
Figure 4-3. CRG Register Summary
PSTP
RTR6
6
0
0
0
0
0
0
MC9S12NE64 Data Sheet, Rev. 1.1
SYSWAI
AUTO
SYN5
RTR5
LVRF
5
0
0
0
0
0
0
NOTE
ROAWAI
LOCKIF
LOCKIE
SYN4
RTR4
ACQ
4
0
0
0
0
0
REFDV3
PLLWAI
LOCK
SYN3
RTR3
3
0
0
0
0
0
0
REFDV2
TRACK
SYN2
CWAI
RTR2
PRE
CR2
Memory Map and Register Definition
2
0
0
0
0
REFDV1
RTIWAI
SCMIE
SCMIF
SYN1
RTR1
PCE
CR1
1
0
0
0
COPWAI
REFDV0
SCME
SYN0
RTR0
Bit 0
SCM
CR0
0
0
0
0
145
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