MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 78

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 2 64 Kbyte Flash Module (S12FTS64KV3)
78
FPLS[1:0]
FPLDIS
Field
1:0
2
Flash Protection Lower address range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in the lower address space of the Flash block.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Lower Address Size — The FPLS[1:0] bits determine the size of the protected/unprotected
area as shown in
1
FPLS[1:0]
For range sizes, refer to and .
FPHS[1:0]
FPOPEN
00
01
10
11
00
01
10
11
1
1
1
1
0
0
0
0
Table 2-11. Flash Protection Higher Address Range
Table
Table 2-12. Flash Protection Lower Address Range
FPHDIS
Address Range
2-12. The FPLS[1:0] bits can only be written to while the FPLDIS bit is set.
Address Range
0xC000-0xFFFF
0xF800-0xFFFF
0xF000-0xFFFF
0xE000-0xFFFF
0x4000-0x4FFF
0x4000-0x41FF
0x4000-0x43FF
0x4000-0x47FF
Table 2-10. Flash Protection Function
1
1
0
0
1
1
0
0
Table 2-9. FPROT Field Descriptions
Unpaged
Unpaged
MC9S12NE64 Data Sheet, Rev. 1.1
FPLDIS
1
0
1
0
1
0
1
0
0x3F: 0xC800-0xCFFF
0x3F: 0xC000-0xCFFF
0x3F: 0xB000-0xCFFF
0x3F: 0x8000-0xCFFF
0x3E: 0x8000-0x81FF
0x3E: 0x8000-0x83FF
0x3E: 0x8000-0x87FF
0x3E: 0x8000-0x8FFF
No Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full Block Protected
Unprotected Low Range
Unprotected High Range
Unprotected High and Low Ranges
Description
Address Range
Address Range
Paged
Paged
Function
Protected Size
1
Protected Size
16 Kbytes
512 bytes
2 Kbytes
4 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
1 Kbyte
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