MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 316

IC MCU 25MHZ ETHERNT/PHY 112LQFP

MC9S12NE64CPV

Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64CPV

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 11 Ethernet Media Access Controller (EMACV1)
11.3.2.3 Transmit Control and Status (TXCTS)
Read: Anytime.
Write: See each bit description.
TXACT — Transmitter Active Status
CSLF — Carrier Sense Lost Flag
PTRC — PAUSE Timer Register Control
SSB — Single Slot Backoff
316
This is a read-only status bit that indicates activity in the EMAC transmitter. TXACT is set after a valid
TCMD write and is cleared when the EMAC has finished sending the transmit frame.
This status bit is set when the carrier sense (half-duplex mode) drops out or is never sensed during
transmission (excluding the preamble) without collision. The frame is transmitted normally and no
retries are performed as a result of this flag. This flag bit is cleared by writing a 1 to it. A write of 0 has
no effect.
This bit can be written anytime.
While set, writes to the PTIME register update the PAUSE duration used in the transmission of a
PAUSE control frame. Reads of the PTIME register return the PAUSE duration used in the
transmission of a hardware-generated PAUSE control frame.
While clear, PTIME register read accesses return the current number of slot times (512 bit times)
remaining in a PAUSE period after the receiver accepts a PAUSE frame. Writes to PTIME are ignored.
This bit can be written anytime, but the user must not change this bit while TXACT is set.
Setting this bit forces the transmitter to backoff for only a single Ethernet slot time instead of following
the random backoff algorithm. For more information about the backoff algorithm, refer to
Section 11.4.3.3.3, “Backoff Generator.”
1 = Transmitter is active.
0 = Transmitter is idle.
1 = Carrier sense lost has been detected without collision during transmission.
0 = No carrier sense lost has been detected.
1 = PTIME controls the transmit PAUSE duration parameter for PAUSE control frames.
0 = PTIME read accesses return the PAUSE timer counter value.
1 = Single slot backoff.
0 = Random backoff.
Module Base + $4
RESET:
W
R
TXACT
7
0
= Unimplemented or Reserved
Figure 11-4. Transmit Control and Status (TXCTS)
6
0
0
MC9S12NE64 Data Sheet, Rev. 1.1
CSLF
5
0
PTRC
4
0
SSB
3
0
2
0
0
1
0
0
Freescale Semiconductor
TCMD
0
0
0

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