MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 163
![IC MCU 25MHZ ETHERNT/PHY 112LQFP](/photos/12/20/122046/mc9s12ne64cpv_sml.jpg)
MC9S12NE64CPV
Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12NE64VTU.pdf
(554 pages)
Specifications of MC9S12NE64CPV
Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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4.4.6
The RTI can be used to generate a hardware interrupt at a fixed periodic rate. If enabled (by setting
RTIE=1), this interrupt will occur at the rate selected by the RTICTL register. The RTI runs with a gated
OSCCLK (see
RTIF flag is set to 1 and a new RTI time-out period starts immediately.
A write to the RTICTL register restarts the RTI time-out period.
If the PRE bit is set, the RTI will continue to run in pseudo-stop mode.
4.4.7
4.4.7.1
The CRGV4 block behaves as described within this specification in all normal modes.
4.4.7.2
The VCO has a minimum operating frequency, f
to a failure or due to long crystal start-up time, the bus clock and the core clock are derived from the VCO
Freescale Semiconductor
Real-Time Interrupt (RTI)
Modes of Operation
Normal Mode
Self-Clock Mode
Section Figure 4-22., “Clock Chain for
gating condition
OSCCLK
= Clock Gate
STOP(PSTP,PRE),
WAIT(RTIWAI),
RTI enable
Figure 4-22. Clock Chain for RTI
MC9S12NE64 Data Sheet, Rev. 1.1
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
÷
SCM
1024
.
. If the external clock frequency is not available due
RTR[6:4]
0:1:0
0:0:1
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
RTI”). At the end of the RTI time-out period the
COUNTER (RTR[3:0])
4-BIT MODULUS
RTI TIMEOUT
Functional Description
163
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