DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 107

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2.5.6
Table 2.15 Branch Instructions
Note:
Instruction
BF
BF/S label
BT
BT/S label
BRA
BRAF Rm
BSR
BSRF Rm
JMP
JSR
RTS
label
label
label
label
@Rm
@Rm
*
Branch Instructions
One cycle when the branch is not executed.
Operation
If T = 0, disp × 2 + PC →
PC;
if T = 1, nop
Delayed branch, if T = 0,
disp × 2 + PC → PC;
if T = 1, nop
If T = 1, disp × 2 + PC →
PC;
if T = 0, nop
Delayed branch, if T = 1,
disp × 2 + PC → PC;
if T = 0, nop
Delayed branch,
disp × 2 + PC → PC
Delayed branch,
Rm + PC → PC
Delayed branch, PC → PR,
disp × 2 + PC → PC
Delayed branch, PC → PR,
Rm + PC → PC
Delayed branch, Rm → PC
Delayed branch, PC → PR,
Rm → PC
Delayed branch, PR → PC
Code
10001011dddddddd
10001111dddddddd
10001001dddddddd
10001101dddddddd
1010dddddddddddd
0000mmmm00100011
1011dddddddddddd
0000mmmm00000011
0100mmmm00101011
0100mmmm00001011
0000000000001011
Rev. 3.00 May 17, 2007 Page 49 of 1582
Execution
Cycles
3/1*
2/1*
3/1*
2/1*
2
2
2
2
2
2
2
REJ09B0181-0300
Section 2 CPU
T Bit
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