DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 801

IC SUPERH MCU FLASH 112LQFP

DF70844AD80FPV

Manufacturer Part Number
DF70844AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70844AD80FPV

Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
16KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70844AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF70844AD80FPV
Quantity:
5 000
15.3.10 Bit Rate Register (SCBRR)
SCBRR is an 8-bit register that, together with the baud rate generator clock source selected by the
CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the serial transmit/receive
bit rate.
The CPU can always read and write to SCBRR.
The SCBRR setting is calculated as follows:
• Asynchronous mode:
• Clock synchronous mode:
N =
N =
B:
N:
Pφ: Operating frequency for peripheral modules (MHz)
n:
8 × 2
64 × 2
Bit rate (bits/s)
SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
(The setting value should satisfy the electrical characteristics.)
Baud rate generator clock source (n = 0, 1, 2, 3) (for the clock sources and values of
n, see table 15.3.)
2n-1
2n-1
Initial value:
× B
× B
× 10
R/W:
× 10
Bit:
6
R/W
6
7
1
- 1
- 1
R/W
6
1
R/W
5
1
R/W
4
1
Section 15 Serial Communication Interface (SCI)
R/W
3
1
Rev. 3.00 May 17, 2007 Page 743 of 1582
R/W
2
1
R/W
1
1
R/W
0
1
REJ09B0181-0300

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