DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 837

IC SUPERH MCU FLASH 112LQFP

DF70844AD80FPV

Manufacturer Part Number
DF70844AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70844AD80FPV

Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
16KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70844AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF70844AD80FPV
Quantity:
5 000
No
No
No
Figure 15.18 Sample Multiprocessor Serial Reception Flowchart (1)
Read receive data in SCRDR
Read receive data in SCRDR
Set MPIE bit in SCSCR to 1
Read ORER and FER flags
Read RDRF flag in SCSSR
Read ORER and FER flags
Read RDRF flag in SCSSR
Clear RE bit in SCSCR to 0
FER = 1? or ORER = 1?
FER = 1? or ORER = 1?
All data received?
This station’s ID?
Start reception
Initialization
RDRF = 1?
RDRF = 1?
in SCSSR
in SCSSR
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error processing
[3]
[1]
[2]
(Continued on
next page)
[4]
[5]
[1]
[2]
[3]
[4]
[5]
Section 15 Serial Communication Interface (SCI)
SCI initialization:
Set the RXD pin using the PFC.
ID reception cycle:
Set the MPIE bit in SCSCR to 1.
SCI status check, ID reception and
comparison:
Read SCSSR and check that the RDRF flag is
set to 1, then read the receive data in SCRDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again, and clear the RDRF flag to 0.
If the data is this station’s ID, clear the RDRF
flag to 0.
SCI status check and data reception:
Read SCSSR and check that the RDRF flag is
set to 1, then read the data in SCRDR.
Receive error processing and break detection:
If a receive error occurs, read the ORER and
FER flags in SCSSR to identify the error.
After performing the appropriate error
processing, ensure that the ORER and FER
flags are all cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RXD pin value.
Rev. 3.00 May 17, 2007 Page 779 of 1582
REJ09B0181-0300

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