DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 214

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 7 User Break Controller (UBC)
7.3.13
BRSR is a 32-bit read-only register. BRSR stores bits 27 to 0 in the address of the branch source
instruction. BRSR has the flag bit that is set to 1 when a branch occurs. This flag bit is cleared to 0
when BRSR is read, the setting to enable PC trace is made, or BRSR is initialized by a power-on
reset or a manual reset. Other bits are not initialized by a power-on reset. The four BRSR registers
(eight pairs for the F-ZTAT version supporting full functions of E10A) have a queue structure and
a stored register is shifted at every branch.
Initial value:
Initial value:
Rev. 3.00 May 17, 2007 Page 156 of 1582
REJ09B0181-0300
Bit
31
30 to 28
27 to 0
R/W:
R/W:
Bit:
Bit:
BSA15 BSA14 BSA13 BSA12 BSA11 BSA10 BSA9
Branch Source Register (BRSR) (Only in F-ZTAT Version)
SVF
31
15
R
R
Bit Name
SVF

BSA27 to
BSA0
0
-
30
14
R
R
0
-
-
29
13
R
R
0
-
-
Initial
Value
0
All 0
Undefined R
28
12
R
R
0
-
-
BSA27 BSA26 BSA25 BSA24 BSA23 BSA22 BSA21 BSA20 BSA19 BSA18 BSA17 BSA16
27
11
R
R
-
-
R/W
R
R
26
10
R
R
-
-
Description
BRSR Valid Flag
Indicates whether the branch source address is stored.
This flag bit is set to 1 when a branch occurs. This flag
is cleared to 0 when BRSR is read, the setting to
enable PC trace is made, or BRSR is initialized by a
power-on reset.
0: The value of BRSR register is invalid
1: The value of BRSR register is valid
Reserved
These bits are always read as 0. The write value
should always be 0.
Branch Source Address
Store bits 27 to 0 of the branch source address.
25
R
R
9
-
-
BSA8
24
R
R
8
-
-
BSA7
23
R
R
7
-
-
BSA6
22
R
R
6
-
-
BSA5
21
R
R
5
-
-
BSA4
20
R
R
4
-
-
BSA3
19
R
R
3
-
-
BSA2
18
R
R
2
-
-
BSA1
17
R
R
1
-
-
BSA0
16
R
R
0
-
-