DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 782

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 15 Serial Communication Interface (SCI)
• Choice of LSB-first or MSB-first data transfer (except for 7-bit data in asynchronous mode)
• Four types of interrupts: There are four interrupt sources, transmit-data-empty, transmit end,
• Module standby mode can be set
Figure 15.1 shows a block diagram of the SCI.
RXD
TXD
SCK
Rev. 3.00 May 17, 2007 Page 724 of 1582
REJ09B0181-0300
[Legend]
SCRSR:
SCRDR:
SCTSR:
SCTDR:
SCSMR:
SCSCR:
SCSSR:
SCBRR:
SCSPTR:
SCSDCR:
receive-data-full, and receive error interrupts, and each interrupt can be requested
independently. The data transfer controller (DTC) or the direct memory access controller
(DMAC) can be activated by the transmit-data-empty interrupt or receive-data-full interrupt to
transfer data.
Receive shift register
Receive data register
Transmit shift register
Transmit data register
Serial mode register
Serial control register
Serial status register
Bit rate register
Serial port register
Serial direction control register
SCRSR
SCRDR
Figure 15.1 Block Diagram of SCI
Parity generation
SCTDR
SCTSR
Parity check
Module data bus
Transmission/reception
control
SCSDCR
SCSPTR
SCSMR
SCSSR
SCSCR
External clock
Clock
Baud rate
generator
SCI
SCBRR
TEI
TXI
RXI
ERI
Internal
data bus
P φ
P φ /4
P φ /16
P φ /64