DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 231

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.2
DTC has the following registers. For details on the addresses of these registers and the states of
these registers in each processing state, see section 27, List of Registers.
These six registers MRA, MRB, SAR, DAR, CRA, and CRB cannot be directly accessed by the
CPU. The contents of these registers are stored in the data area as transfer information. When a
DTC activation request occurs, the DTC reads a start address of transfer information that is stored
in the data area according to the vector address, reads the transfer information, and transfers data.
After the data transfer, it writes a set of updated transfer information back to the data area.
On the other hand, DTCERA to DTCERE, DTCCR, and DTCVBR can be directly accessed by the
CPU.
Table 8.1
Register Name
DTC enable register A
DTC enable register B
DTC enable register C
DTC enable register D
DTC enable register E
DTC control register
DTC vector base register
Bus function extending register BSCEHR
Register Descriptions
Register Configuration
Abbrevia-
tion
DTCERA
DTCERB
DTCERC
DTCERD
DTCERE
DTCCR
DTCVBR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
H'0000
H'0000
H'0000
H'0000
H'0000
H'00
H'00000000
H'0000
Rev. 3.00 May 17, 2007 Page 173 of 1582
Section 8 Data Transfer Controller (DTC)
Address
H'FFFFCC80
H'FFFFCC82
H'FFFFCC84
H'FFFFCC86
H'FFFFCC88
H'FFFFCC90
H'FFFFCC94
H'FFFFE89A
REJ09B0181-0300
Access Size
8, 16
8, 16
8, 16
8, 16
8, 16
8
8, 16, 32
8, 16