DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 996

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 18 I
Rev. 3.00 May 17, 2007 Page 938 of 1582
REJ09B0181-0300
2
C Bus Interface 2 (I
No
No
Clear ACKBT in ICIER to 0
Set ACKBT in ICIER to 1
Dummy-read ICDRR
Read RDRF in ICSR
Read RDRF in ICSR
Slave receive mode
Clear AAS in ICSR
Read ICDRR
Read ICDRR
Read ICDRR
RDRF=1 ?
RDRF=1 ?
Figure 18.21 Sample Flowchart for Slave Receive Mode
Last receive
End
- 1?
Yes
Yes
No
2
C2)
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[1] Clear the AAS flag.
[2] Set acknowledge to the transmit device.
[3] Dummy-read ICDRR.
[4] Wait for 1 byte to be received.
[5] Check whether it is the (last receive - 1).
[6] Read the receive data.
[7] Set acknowledge of the last byte.
[8] Read the (last byte - 1) of receive data.
[9] Wait the last byte to be received.
[10] Read for the last byte of receive data.
Note: When the size of receive data is only one byte in
reception, steps [2] to [6] are skipped after
step [1], before jumping to step [7]. The step [8]
is dummy-read in ICDRR.
However, when the size of receive data is two
bytes and more, steps [2] to [6] are not skipped
after step [1].