M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 114

MCU 3/5V 0K,PB-FREE 100-QFP

M30800SFP-BL#U5

Manufacturer Part Number
M30800SFP-BL#U5
Description
MCU 3/5V 0K,PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer
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Price
Company:
Part Number:
M30800SFP-BL#U5M30800SFP-BL#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30800SFP-BL#U5
Manufacturer:
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Quantity:
10 000
M
R
R
e
E
1
v
J
6
Figure 13.8 The relationship between the two-phase pulse (A phase and B phase) and the Z phase
1 .
0
C
9
0 .
8 /
B
0
0
• Counter Resetting by Two-Phase Pulse Signal Processing
0
1
A
This function resets the timer counter to “0” when the Z-phase (counter reset) is input during two-
phase pulse signal processing.
This function can only be used in timer A3 event counter mode, two-phase pulse signal processing,
free-run type, and multiply-by-4 processing. The Z phase is input to the INT2 pin.
When the Z-phase input enable bit (bit 5 at address 0342
Z-phase input. For the counter to be reset to “0” by Z-phase input, you must first write “0000
timer A3 register (address 034D
The Z-phase is input when the INT2 input edge is detected. The edge polarity is selected by the INT2
polarity switch bit (bit 4 at address 009C
of the timer A3 count source. Figure 13.8 shows the relationship between the two-phase pulse (A
phase and B phase) and the Z phase.
The counter is reset at the count source following Z-phase input. Figure 13.9 shows the timing at
which the counter is reset to “0”.
8
G
u
7
TA3
(A phase)
Count source
TA3
(B phase)
INT2
(Z phase)
o r
. g
0 -
u
1
0
p
0
OUT
, 2
IN
0
(Note)
2
Note: When the rising edge of INT2 is selected
0
0
5
Page 101
f o
The pulse must be wider than this width.
3
2
9
16
and 034C
16
). The Z-phase must have a pulse width greater than 1 cycle
16
).
16
) is set to “1”, the counter can be reset by
13. Timer A
16
” to the

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