M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 95

MCU 3/5V 0K,PB-FREE 100-QFP

M30800SFP-BL#U5

Manufacturer Part Number
M30800SFP-BL#U5
Description
MCU 3/5V 0K,PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Price
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Manufacturer:
Renesas Electronics America
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Part Number:
M30800SFP-BL#U5
Manufacturer:
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Quantity:
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M
R
R
e
E
1
v
J
6
Figure 11.2 DMAC register (1)
1 .
0
C
9
0 .
8 /
B
0
DMAi request cause select register (i = 0 to 3)(Note 1)
b7
0
0
1
A
8
G
b6
u
7
o r
. g
0 -
b5
u
1
0
p
0
, 2
0
b4
2
0
b3
0
5
b2
Page 82
b1
b0
Note 1: Please refer to DMAC precautions.
Note 2: Set DMA inhibit before changing the DMA request cause. Set DRQ to "1"
Note 3: DMA0-INT0, DMA1-INT1, DMA2-INT2, and DMA3-INT3 correspond to DMAi and
Note 4: UARTi reception and ACK switching are effected using the UARTi special mode
Note 5: When setting DSR to "1", set DRQ to "1" using OR instruction etc. simultaneously.
Note 6: Do not write "0" to this bit. There is no need to clear the DMA request bit.
Nothing is assigned.
When write, set "0". When read, its content is indeterminate.
Bit symbol
f o
DSEL0
DSEL1
DSEL2
DSEL3
DRQ
DSR
DSEL4
Symbol
DMiSL
3
simultaneously.
INTi. However, when INT3 pin becomes data bus in microprocessor mode, DMA3-
INT3 cannot be used.
register and UARTi special mode register 2.
2
e.g.) MOV.B #083h, DMiSL
e.g.) OR.B #0A0h, DMiSL
9
DMA request cause
Software DMA
request bit
DMA request bit
(Note 5,6)
(Note 2)
Bit name
(Note 5)
select bit
0378
Address
16
to 037B
0 0 0 0 0 : Software trigger
0 0 0 0 1 : Falling edge of INTi pin (Note 3)
0 0 0 1 0 : Two edges of INTi pin (Note 3)
0 0 0 1 1 : Timer A0
0 0 1 0 0 : Timer A1
0 0 1 0 1 : Timer A2
0 0 1 1 0 : Timer A3
0 0 1 1 1 : Timer A4
0 1 0 0 0 : Timer B0
0 1 0 0 1 : Timer B1
0 1 0 1 0 : Timer B2
0 1 0 1 1 : Timer B3
0 1 1 0 0 : Timer B4
0 1 1 0 1 : Timer B5
0 1 1 1 0 : UART0 transmit
0 1 1 1 1 : UART0 receive
1 0 0 0 0 : UART1 transmit
1 0 0 0 1 : UART1 receive
1 0 0 1 0 : UART2 transmit
1 0 0 1 1 : UART2 receive/ACK (Note 4)
1 0 1 0 0 : UART3 transmit
1 0 1 0 1 : UART3 receive/ACK (Note 4)
1 0 1 1 0 : UART4 transmit
1 0 1 1 1 : UART4 receive/ACK (Note 4)
1 1 0 0 0 : A/D conversion
1 1 0 0 1 to 1 1 1 1 1 : Inhibit
If software trigger is selected, a
DMA request is generated by
setting this bit to “1” (When read,
the value of this bit is always “0”)
0 : Not requested
1 : Requested
b4 b3 b2 b1 b0
16
; Set timer A0
When reset
0X000000
Function
2
11. DMAC
R
W

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