M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 324

MCU 3/5V 0K,PB-FREE 100-QFP

M30800SFP-BL#U5

Manufacturer Part Number
M30800SFP-BL#U5
Description
MCU 3/5V 0K,PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer:
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Part Number:
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M
R
R
32.2 Overview of standard serial I/O mode 2 (clock asynchronized)
e
E
1
v
J
6
Figure 32.20 Peripheral unit and initial communication
1 .
0
C
In standard serial I/O mode 2, software commands, addresses and data are input and output between the
MCU and peripheral units (serial programer, etc.) using 2-wire clock-asynchronized serial I/O (UART1).
Standard serial I/O mode 2 is engaged by releasing the reset with the P6
The TxD
After the reset is released, connections can be established at 9,600 bps when initial communications (Fig-
ure 32.20) are made with a peripheral unit. However, this requires a main clock with a minimum 2 MHz input
oscillation frequency. Baud rate can also be changed from 9,600 bps to 19,200, 38,400, 57,600 or 115,200
bps by executing software commands. However, communication errors may occur because of the oscilla-
tion frequency of the main clock. If errors occur, change the main clock's oscillation frequency and the baud
rate.
After executing commands from a peripheral unit that requires time to erase and write data, as with erase
and program commands, allow a sufficient time interval or execute the read status command and check
how processing ended, before executing the next command.
Data and status registers in memory can be read after transmitting software commands. Status, such as
the operating state of the flash memory or whether a program or erase operation ended successfully or not,
can be checked by reading the status register. Here following are explained initial communications with
peripheral units, how frequency is identified and software commands.
Initial communications with peripheral units
9
0 .
8 /
B
After the reset is released, the bit rate generator is adjusted to 9,600 bps to match the oscillation fre-
quency of the main clock, by sending the code as prescribed by the protocol for initial communications
with peripheral units (Figure 32.20).
*1. If the peripheral unit cannot receive "B0
0
0
0
1
(1) Transmit "00
(2) The MCU with internal flash memory outputs the "B0
A
clock.
G
8
u
7
rate generator so that "00
successfully *
interval of a minimum 15 ms. Also, the baud rate at the end of initial communications is 9,600 bps.
o r
. g
0 -
1
u
1
0
p
pin is for CMOS output. Data transfer is in 8-bit units with LSB first, 1 stop bit and parity OFF.
(1) Transfer "00
0
, 2
0
2
0
At least 15ms
transfer interval
0
5
Page 311
16
1
. Initial communications must be transmitted at a speed of 9,600 bps and a transfer
" from a peripheral unit 16 times. (The MCU with internal flash memory sets the bit
16
" 16 times
Peripheral unit
The bit rate generator setting completes (9600bps)
15 th
16th
f o
3
16
2
1st
2nd
9
" can be successfully received.)
16
" successfully, change the oscillation frequency of the main
"B0
"00
"00
"00
"00
16
16
16
16
16
"
"
"
"
"
16
" check code and initial communications end
MCU with internal
flash memory
(2) Transfer check code "B0
5
32. Standard serial I/O mode
(CLK
Reset
1
) pin "L" level.
16
"

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