M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 354

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
1
6
Version
Rev.1.0
C
8 /
0
G
o r
Page 46, 79 Note 9 'Do not set CM04 and CM07 simultaneously.' --> deleted
Page 48 'The priority level of the interrupt which is not used to cancel stop mode,must have
Page 50 'The priority level of the interrupt which is not used to cancel wait mode,must have
Page 54 Figure 8.7 The arrow of CM07="1" and CM05="1" deleted.
Page 70 Interrupt request accepted. To CLK --> Interrupt request priority detection results
Page 74 'Signal of "L" level width...for NMI pin.' --> 'Signals input to the NMI ...from the opera-
Page 75 (5) Rewrite the interrupt control register
Page 78 'Therefore,we recom-mend using the watchdog timer to improve reliability of a sys-
Page 90 '2 instructions' --> '26 cycles', Program example revised, (4) --> added
Page 91 (5) Recommended procedure for starting DMA transfer--> added
Page 92 'Count source for each timer becomes an operation clock for timer operation as
Page 95 Figure 13.1 Up/Down flag Note2 --> added
Page 99 'TAi
Page 103, 104 Selected by event/trigger select register --> Selected by event/trigger select
Page 106 Figure 14.2, 11: Inhibited --> 11: Must not be set
Page 109 TBi
Page 110 Interrupt request generation timing, Figure 14.6
Page 112 Figure 15.1 Note 5 Rewrite the INV00 to INV02 and INV06 bits when the timers
Page 113 Figure 15.2 Note 1--> added
Page 114 Figure 15.3, Timer Ai register value Note 2 --> added
Page 130 to 132 Inhibited --> Must not be set
Page 134 Figure 16.10 UART transmit/receive control register 2
u
p
A1,A2,A4 and B stop. -->added
Three-phase output buffer register 0, 1 00
been changed to 0.' , 'If only a hardware reset or an NMI interrupt is used to cancel stop
mode,change the priority level of all interrupt to 0,then shift to stop mode.' --> added
been changed to 0.', 'If only a hardware reset or an NMI interrupt is used to cancel stop
mode,change the priority level of all interrupt to 0,then shift to wait mode.' --> added
tion clock of CPU.'
'When attempting to clear the interrupt...Instructions :MOV' --> added
tem.' --> added
counting and reloading,etc.' --> added,
Figure 12.1 One-shot mode --> One-shot timer mode
Two-phase pulse input (Set the corresponding function select registers A to I/O
port,and port direction register to "0")
bit
Programable I/O port or --> added, Figure 14.5 11: Inhibited --> 11: Must not be set
'When an overflow occurs.(Simultaneously,the timer Bi overflow flag... the timer Bi
mode register.)' --> 'Timer overflow.When an overflow occurs... the timer start flag is
set to "1".
Note 4 --> added
x0000000 --> x0xx0000
output(to clock generation circuit)
Figure13.3 Timer Ai register (FFFF --> FFFE revised)
Note 9 'In addition,do not rewrite CM04 and CM05 simultaneously' --> added
IN
IN
pin function', 'TAi
Pin function
OUT
Contents for change
pin function' specification revised
C - 12
16
--> 3F
16
Revision History
Revision
02/08/'05
date