M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 169

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
1
v
J
6
Figure 20.1 UART2 special mode register
1 .
0
C
9
0 .
8 /
B
0
0
0
1
UARTi special mode register 2
A
UARTi special mode register
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
8
G
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
2
0
0
5
Page 156
Note 1: Nothing but "0" may be written.
Note 2: UART2 : timer A0 underflow signal, UART3 : timer A3 underflow signal, UART4 : timer A4
IICM
ABC
ABSCS
ACSE
BBS
LSYN
SSS
symbol
symbol
Nothing is assigned.
When write, set "0". When read, the content is "0".
SWC2
IICM2
SHTC
SWC
SDHI
CSC
STC
ALS
Bit
Bit
f o
UiSMR2 (i=2 to 4)
underflow signal.
UiSMR (i=2 to 4)
Symbol
Symbol
3
I C mode select bit
Arbitration lost detecting
flag control bit
Bus collision detect
sampling clock select bit
Transmit start condition
select bit
Bus busy flag
SCLL sync output
enable bit
Auto clear function
select bit of transmit
enable bit
2
2
IIC mode select bit 2
Clock synchronous bit
SCL wait output bit 2
SCL wait output bit
SDA output stop flag
UARTi initialize bit
SDA output inhibit bit
Start/stop condition
control bit
9
Bit name
name
Bit
0336
0337
16
, 0326
16
Address
(During clock synchronous
0 : Normal mode
1 : I C mode
0 : Update per bit
1 : Update per byte
0 : STOP condition detected
1 : START condition detected
0 : Disabled
1 : Enabled
Set to “0”
Set to “0”
Set to “0”
, 0327
Address
20. UARTi Special Mode Register (i = 2 to 4)
2
Refer to Table 20.2
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : UARTi clock
1 : 0 output
0 : Enabled
1 : Disabled (high impedance)
Set to "1" in selecting IIC mode.
serial I/O mode)
16
, 02F6
16
Function
, 02F7
16
16
When reset
00
When reset
16
00
0 : Ordinary
1 : Falling edge of RxDi
0 : Rising edge of transfer
1 : Underflow signal of timer Ai
0 : No auto clear function
1 : Auto clear at occurrence of
Set to “0”
Set to “0”
Set to “0”
Set to “0”
16
Function
clock
bus collision
(During UART mode)
Function
(Note 2)
(Note 1)
R
R
W
W