M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 168

MCU 3/5V 0K,PB-FREE 100-QFP

M30800SFP-BL#U5

Manufacturer Part Number
M30800SFP-BL#U5
Description
MCU 3/5V 0K,PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer:
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Part Number:
M30800SFP-BL#U5
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Quantity:
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M
R
R
e
E
1
v
J
6
Table 20.1 Features in I
Note 1: Make the settings given below when I
Note 2: Follow the steps given below to switch from a factor to another.
Note 3: Set an initial value of SDA transmission output when IIC mode (IIC mode select bit = "1") is valid and serial I/O is invalid.
1 .
10
0
11
C
1
2
3
4
5
6
7
8
9
20. UARTi Special Mode Register (i = 2 to 4)
(1) IIC Bus Interface Mode
9
0 .
8 /
B
UART2 to UART4 operate the IIC bus interface (simple IIC bus) using the UARTi special mode register
(addresses 0336
0336
mode resister 3 (addresses 0325
The I
Table 20.1 shows the construction of the UARTi special mode register and UARTi special mode register
2.
When the I
(simple I
To use the I
register. In UART3 and 4, set the data output select bit (bit 5 in address 032C
open drain output.
Table 20.1 shows the relationship of the IIC mode select bit to control. To use the chip in the clock
synchronized serial I/O mode or clock asynchronized serial I/O mode, always set this bit to “0”.
0
Factor of interrupt number 39 to 41 (Note 2)
P7
Factor of interrupt number 33, 35, 37 (Note 2)
Factor of interrupt number 34, 36, 38 (Note 2)
UARTi transmission output delay
P7
Noise filter width
Reading P7
Initial value of UARTi output
P7
DMA1 factor at the time when 1 1 0 1 is assigned
to the DMA request factor selection bits
0
0
1
A
1
2
0
G
1. Disable the interrupt of the corresponding number.
2. Switch from a factor to another.
3. Reset the interrupt request flag of the corresponding number.
4. Set an interrupt level of the corresponding number.
8
, P9
, P9
, P9
u
7
o r
16
2
Set 0 1 0 in bits 2, 1, 0 of the UARTi transmission/reception mode register.
Disable the RTS/CTS function. Choose the MSB First function.
. g
0 -
C bus interface mode is provided with UART2 to UART4.
u
1
0
, 0326
2
1
0
, P9
, P9
, P9
p
0
2
, 2
0
C bus) interface circuit is enabled.
1
5
6
7
, P9
2
2
2
C mode select bit (bit 0 in addresses 0337
0
at the time when UARTi is in use
at the time when UARTi is in use
at the time when UARTi is in use
C bus, set the SCLi and the SDAi of both master and slave to output with the function select
Function
16
0
1
5
, P9
and 02F6
Page 155
16
7
, 0326
2
C mode
16
16
f o
[i = 2 to 4]). UART3 and UART4 add special functions using UARTi special
and 02F6
3
2
9
16
2
C mode is in use.
and 02F5
16
[i = 2 to 4]) and UARTi special mode register 2 (addresses
Bus collision detection
UARTi transmission
UARTi reception
Not delayed
TxD
RxD
CLKi
UARTi reception
15ns
Reading the terminal when 0 is
assigned to the direction register
H level (when 0 is assigned to
the CLK polarity select bit)
16
i
i
(output)
(input)
[i = 3 or 4]).
Normal mode
20. UARTi Special Mode Register (i = 2 to 4)
16
, 0327
16
and 02F7
Start condition detection or stop
condition detection
SDAi (input/output) (Note 3)
50ns
Reading the terminal regardless of the
value of the direction register
No acknowledgment detection (NACK)
Acknowledgment detection (ACK)
Delayed
SCLi (input/output)
P7
Acknowledgment detection (ACK)
The value set in latch P7
when the port is selected (Note 3)
2
, P9
16
16
0
) is set to “1”, the I
and 02FC
, P9
I
2
C mode (Note 1)
5
16
) to N-channel
0
, P9
2
, P9
2
C bus
6

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