M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 290

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
1
v
J
6
Figure 30.2 CPU rewrite mode set/reset flowchart
1 .
0
C
9
0 .
8 /
B
0
0
Note 1: During CPU rewrite mode, set the main clock frequency as shown below using the main clock division
Note 2: For CPU rewrite mode select bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
Note 3: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to
Note 4: “1” can be set. However, when this bit is “1”, user ROM area is accessed.
0
1
(Subsequent operations are executed by control
A
G
8
Jump to transferred control program in RAM
u
7
o r
. g
0 -
Single-chip mode, memory expansion
u
1
Set processor mode register (Note 1)
0
register (address 000C
6.25 MHz or less when wait bit (bit 2 at address 0005
12.5 MHz or less when wait bit (bit 2 at address 0005
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval. Use the program except in the internal
flash memory for write to this bit. Also write to this bit when NMI pin is "H" level.
execute a read array command or reset the flash memory.
p
0
Transfer CPU rewrite mode control
, 2
0
2
0
program to internal RAM
0
program in this RAM)
Program in ROM
mode, or boot mode
5
Page 277
Start
*1
16
f o
):
3
2
9
16
16
Execute read array command or reset flash
memory by setting flash memory reset bit (by
writing “1” and then “0” in succession) (Note 3)
) = “0” (without internal access wait state)
) = “1” (with internal access wait state)
Set CPU rewrite mode select bit to “1” (by
writing “0” and then “1” in succession)(Note 2)
(Boot mode only)
Write “0” to user ROM area select bit (Note 4)
Using software command execute erase,
program, or other operation
(Set lock bit disable bit as required)
Write “0” to CPU rewrite mode select bit
(Boot mode only)
Set user ROM area select bit to “1”
Program in RAM
End
*1
30. CPU Rewrite Mode