M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 88

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

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1
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Figure 9.12 Switching condition of INT interrupt request
6
1 .
0
C
(5) Rewrite the interrupt control register
(6) Address match interrupt
9
0 .
• Do not set the following addresses to the address match interrupt register.
8 /
B
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the
• When attempting to clear the interrupt request bit of an interrupt control register, the interrupt request
1. The address of the starting instruction in an interrupt routine.
2. Any of the next 7 instructions addresses immediately after an instruction to clear an interrupt request
3. Any of the next 3 instructions addresses immediately after an instruction to set the interrupt enable
4. Any of the next 3 instructions addresses immediately after an instruction to rewrite a processor inter-
0
0
0
interrupt request bit is not set sometimes even if the interrupt request for that register has been gener-
ated. This will depend on the instruction. If this creates problems, use the below instructions to change
the register.
Instructions : AND, OR, BCLR, BSET
bit is not cleared sometimes. This will depend on the instruction. If this creates problems, use the
below instructions to change the register.
Instructions : MOV
bit of an interrupt control register or an instruction to rewrite an interrupt priority level to a smaller value.
flag (I flag).
rupt priority level (IPL) to a smaller value.
1
A
G
8
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
2
0
0
5
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f o
3
2
9
(Enable the accepting of INT interrupt request)
______
Set the interrupt priority level to level 1 to 7
Set the interrupt priority level to level 0
Clear the interrupt request bit to “0”
Set the polarity select bit
(Disable
INT
interrupt)
9. Interrupt Outline