M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 129

MCU 3/5V 0K,PB-FREE 100-QFP

M30800SFP-BL#U5

Manufacturer Part Number
M30800SFP-BL#U5
Description
MCU 3/5V 0K,PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SFP-BL#U5M30800SFP-BL#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30800SFP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
1
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J
6
1 .
0
C
9
0 .
Figure 15.5 shows the block diagram for three-phase waveform mode. In “L” active output polarity in
three-phase waveform mode, the positive-phase waveforms (U phase, V phase, and W phase) and
negative waveforms (U phase, V phase, and W phase), six waveforms in total, are output from P8
P7
phase and U phase, timer A1 controls the V phase and V phase, and timer A2 controls the W phase and
W phase respectively; timer B2 controls the periods of one-shot pulse output from timers A4, A1, and A2.
In outputting a waveform, dead time can be set so as to cause the “L” level of the positive waveform
output (U phase, V phase, and W phase) not to lap over the “L” level of the negative waveform output (U
phase, V phase, and W phase).
To set short circuit time, use three 8-bit timers sharing the reload register for setting dead time. A value
from 1 through 255 can be set as the count of the timer for setting dead time. The timer for setting dead
time works as a one-shot timer. If a value is written to the dead timer (030C
reload register shared by the three timers for setting dead time.
Any of the timers for setting dead time takes the value of the reload register into its counter, if a start
trigger comes from its corresponding timer, and performs a down count in line with the clock source
selected by the dead time timer count source select bit (bit 2 at 0309
trigger again before the workings due to the previous trigger are completed. In this instance, the timer
performs a down count from the reload register’s content after its transfer, provoked by the trigger, to the
timer for setting dead time.
Since the timer for setting dead time works as a one-shot timer, it starts outputting pulses if a trigger
comes; it stops outputting pulses as soon as its content becomes 00
come.
The positive waveforms (U phase, V phase, and W phase) and the negative waveforms (U phase, V
phase, and W phase) in three-phase waveform mode are output from respective ports by means of
setting “1” in the output control bit (bit 3 at 0308
impedance state. This bit can be set to “0” not only by use of the applicable instruction, but by entering a
falling edge in the NMI terminal or by resetting. Also, if “1” is set in the positive and negative phases
concurrent L output disable function enable bit (bit 4 at 0308
phase, V phase and V phase, and W phase and W phase concurrently go to “L”, as a result, the output
control bit becomes the high-impedance state.
8 /
___
B
0
0
0
1
2
A
, P7
8
G
u
7
o r
. g
0 -
___
u
3
1
0
, P7
p
0
, 2
0
___
2
___
4
0
, and P7
0
5
Page 116
_______
___
___
___
5
as active on the “L” level. Of the timers used in this mode, timer A4 controls the U
f o
3
___
2
9
___
16
___
15. Three-phase motor control timers’ functions
). Setting “0” in this bit causes the ports to be the high-
___
16
) causes one of the pairs of U phase and U
16
16
, and waits for the next trigger to
). The timer can receive another
16
), the value is written to the
___
0
, P8
___
___
___
1
,

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