M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 60

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
8.3 Clock Output
e
E
1
v
Figure 8.5 Main clock division register
J
6
1 .
0
C
9
0 .
8 /
In single chip mode, when the BCLK output function select bit (bit 7 at address 0004
can output f
bits (bits 1 and 0 at address 0006
Even when you set PM07 to “0” and CM01 and CM00 to “00
In memory expansion mode or microprocessor mode, when the ALE pin select bits (bits 5 and 4 at ad-
dress 0005
from the P5
In memory expansion mode or microprocessor mode, when PM15 and PM14 are other than “01
BCLK)” and PM07 is “0” and CM01 and CM00 to “00
pins.
When stopping clock output in memory expansion mode or microprocessor mode, set PM07 to “1” and
CM01 and CM00 to “00
(P5
When the WAIT peripheral function clock stop bit (bit 2 at address 0006
output is stopped when a WAIT command is executed.
Table 8.2 shows clock output setting (single chip mode) and Table 8.3 shows clock output setting
(memory expansion/microprocessor mode).
Note :When outputting the f
B
b7
0
Main clock division register (Note 1)
0
0
1
A
3
G
8
b6
/BCLK)” and CM01 and CM00 are “00
u
7
P5
o r
. g
0 -
b5
u
1
7
0
p
/RDY as an input only port.
0
, 2
_______
0
b4
16
2
3
8
/BCLK/ALE/CLK
0
b3
, f
:PM15, PM14) are other than “01
0
32
5
b2
, or fc from the P5
Page 47
b1
b0
2
Note 1: Set bit 0 of the protect register (address 000A
Note 2: These bits are "01000
Note 3: Do not attempt to set combinations of values other than those shown in
” (IO port P5
Nothing is assigned.
When write, set "0". When read, their contents are indeterminate.
Bit symbol
8
f o
MCD1
MCD2
MCD3
MCD4
, f
MCD0
OUT
Symbol
MCD
32
3
2
this register.
or you shift to stop mode.
this figure.
9
or fc from port P5
16
pins by setting CM01 and CM00.
3
/BCLK/ALE/CLK
:CM01, CM00).(Note)
3
). The P5
Main clock division select
bit (Note 2)
2
”, PM07 is ignored and the P5
Bit name
3
2
(P5
function is not selected. When PM15 and PM14 are “01
Address
000C
3
/BCLK/ALE/CLK
3
/BCLK)” and PM07 is “1”, you can output f
2
2
OUT
”, BCLK is output from the P5
" (8-division mode) when main clock is stopped
16
pins by setting the clock output function select
2
When reset
XXX01000
1 0 0 1 0 : No division mode
0 0 0 1 0 : Division by 2 mode
0 0 0 1 1 : Division by 3 mode
0 0 1 0 0 : Division by 4 mode
0 0 1 1 0 : Division by 6 mode
0 1 0 0 0 : Division by 8 mode
0 1 0 1 0 : Division by 10 mode
0 1 1 0 0 : Division by 12 mode
0 1 1 1 0 : Division by 14 mode
0 0 0 0 0 : Division by 16 mode
”, no BCLK is output.
b4 b3 b2 b1 b0
OUT
2
pin in single chip mode, use port
8. Clock Generating Circuit
16
Function
3
16
pin is set for ALE output.
) is set to “1”, f
) to “1” before writing to
3
16
/BCLK/ALE/CLK
:PM07) is “1”, you
8
or f
8
, f
R
32
32
W
2
, or fc
(P5
clock
OUT
3
2
/