DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 101

IC H8S/2268 MCU FLASH 100QFP

DF2268FA13V

Manufacturer Part Number
DF2268FA13V
Description
IC H8S/2268 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2268FA13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2268FA13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.9
2.9.1
Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction. The TAS
instruction is not generated by the Renesas H8S and H8/300 Series C/C++ compilers. If the TAS
instruction is used as a user-defined intrinsic function, ensure that only register ER0, ER1, ER4, or
ER5 is used.
2.9.2
With the STM or LDM instruction, the ER7 register is used as the stack pointer, and thus cannot
be used as a register that allows save (STM) or restore (LDM) operation.
With a single STM or LDM instruction, two to four registers can be saved or restored. The
available registers are as follows:
For two registers:
For three registers: ER0 to ER2, or ER4 to ER6
For four registers: ER0 to ER3
For the Renesas Technology H8S or H8/300 Series C/C++ Compiler, the STM/LDM instruction
including ER7 is not created.
2.9.3
When bit-manipulation is used with registers that include write-only bits, bits to be manipulated
may not be manipulated properly or bits unrelated to the bit-manipulation may be changed.
Some values read from write-only bits are fixed and some are undefined. When such bits are the
operands of bit-manipulation instructions that use read values in arithmetic operations (BNOT,
BTST, BAND, BIAND, BOR, BIOR, BXOR, BIXOR, BLD, BILD), the desired bit-manipulation
will not be executed.
Also, bit-manipulation instructions that write back data according to the results of arithmetic
operations (BSET, BCLR, BNOT, BST, BIST) may change bits that are not related to the bit-
manipulation. Therefore, special care is necessary when using these instructions with registers that
include write-only bits.
TAS Instruction
STM/LDM Instruction
Bit Manipulation Instructions
Usage Notes
ER0 and ER1, ER2 and ER3, or ER4 and ER5
Rev. 5.00 Sep. 01, 2009 Page 49 of 656
REJ09B0071-0500
Section 2 CPU

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