DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 39

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 Overview
Figure 1.1
Figure 1.2
Figure 1.3
Figure 1.4
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10 Memory Data Formats............................................................................................ 28
Figure 2.11 Instruction Formats (Examples) ............................................................................. 40
Figure 2.12 Branch Address Specification in Memory Indirect Mode...................................... 44
Figure 2.13 State Transitions..................................................................................................... 48
Figure 2.14 Flowchart of Access Method for Registers with Write-Only Bits.......................... 52
Section 3 MCU Operating Modes
Figure 3.1
Figure 3.1
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Figure 4.3
Section 5 Interrupt Controller
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
Figure 5.5
Internal Block Diagram of H8S/2268 Group ......................................................... 3
Internal Block Diagram of H8S/2264 Group ......................................................... 4
Pin Arrangement of H8S/2268 Group.................................................................... 5
Pin Arrangement of H8S/2264 Group.................................................................... 6
Exception Vector Table (Normal Mode)................................................................ 17
Stack Structure in Normal Mode............................................................................ 17
Exception Vector Table (Advanced Mode)............................................................ 18
Stack Structure in Advanced Mode........................................................................ 19
Memory Map.......................................................................................................... 20
CPU Registers ........................................................................................................ 21
Usage of General Registers .................................................................................... 22
Stack Status ............................................................................................................ 23
General Register Data Formats (1)......................................................................... 26
General Register Data Formats (2)......................................................................... 27
Address Map (1)..................................................................................................... 57
Address Map (2)..................................................................................................... 58
Reset Sequence (Advanced Mode with On-chip ROM Enabled)........................... 62
Stack Status after Exception Handling (Advanced Mode) ..................................... 65
Operation when SP Value Is Odd........................................................................... 66
Block Diagram of Interrupt Controller for H8S/2268 Group ................................. 68
Block Diagram of Interrupt Controller for H8S/2264 Group ................................. 69
Block Diagram of IRQn Interrupts......................................................................... 81
Set Timing for IRQnF ............................................................................................ 82
Block Diagram of Interrupts WKP7 to WKP0 ....................................................... 83
Figures
Rev. 5.00 Sep. 01, 2009 Page xxxvii of l
REJ09B0071-0500