DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 157

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.2.2
BARB is the channel B break address register. The bit configuration is the same as for BARA.
6.2.3
BCRA controls channel A PC breaks.
Bit
7
6
5
4
3
2
1
Bit Name
CMFA
CDA
BAMRA2
BAMRA1
BAMRA0
CSELA1
CSELA0
Break Address Register B (BARB)
Break Control Register A (BCRA)
Initial
Value
0
0
0
0
0
0
0
R/W
R/(W) *
R/W
R/W
R/W
R/W
R/W
R/W
1
Description
CPU Cycle/DTC Cycle Select A
Break Address Mask Register A2 to A0
These bits specify which bits of the break address set in
BARA are to be masked.
000: BAA23 – 0 (All bits are unmasked)
001: BAA23 – 1 (Lowest bit is masked)
010: BAA23 – 2 (Lower 2 bits are masked)
011: BAA23 – 3 (Lower 3 bits are masked)
100: BAA23 – 4 (Lower 4 bits are masked)
101: BAA23 – 8 (Lower 8 bits are masked)
110: BAA23 – 12 (Lower 12 bits are masked)
111: BAA23 – 16 (Lower 16 bits are masked)
Break Condition Select
Selects break condition of channel A.
00: Instruction fetch is used as break condition
01: Data read cycle is used as break condition
10: Data write cycle is used as break condition
11: Data read/write cycle is used as break condition
Condition Match Flag A
[Setting condition]
When a condition set for channel A is satisfied
[Clearing condition]
When 0 is written to CMFA after reading *
Selects the channel A break condition bus master.
0: CPU
1: CPU or DTC
Rev. 5.00 Sep. 01, 2009 Page 105 of 656
Section 6 PC Break Controller (PBC)
REJ09B0071-0500
2
CMFA = 1