DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 237

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The H8S/2268 Group has an on-chip 16-bit timer pulse unit (TPU) comprised of three 16-bit timer
channels, and the H8S/2264 Group has the TPU comprised of two 16-bit timer channels. The
function list of the TPU is shown in table 10.1. A block diagram of the TPU for the H8S/2268
Group and that for the H8S/2264 Group are shown figures 10.1 and 10.2, respectively.
10.1
• Maximum 8-pulse input/output (H8S/2268 Group)
• Maximum 4-pulse input/output (H8S/2264 Group)
• Selection of 7 or 8 counter input clocks for each channel
• The following operations can be set for each channel:
• Buffer operation settable for channel 0 (H8S/2268 Group only)
• Phase counting mode settable independently for each of channels 1 and 2 (H8S/2268 Group
• Fast access via internal 16-bit bus
• 13-type interrupt sources (H8S/2268 Group)
• 6-type interrupt sources (H8S/2264 Group)
• Register data can be transmitted automatically
• A/D converter conversion start trigger can be generated
• Module stop mode can be set
TIMTPU3B_000020030700
⎯ Waveform output at compare match
⎯ Input capture function
⎯ Counter clear operation
⎯ Synchronous operation:
⎯ PWM output with any duty level is possible
⎯ A maximum 7-phase (H8S/2268 Group)/3-phase (H8S/2264 Group) PWM output is
only)
Multiple timer counters (TCNT) can be written to simultaneously
Simultaneous clearing by compare match and input capture is possible
Register simultaneous input/output is possible by synchronous counter operation
possible in combination with synchronous operation
Features
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev. 5.00 Sep. 01, 2009 Page 185 of 656
Section 10 16-Bit Timer Pulse Unit (TPU)
REJ09B0071-0500