DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 51

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 14.9
Section 15 A/D Converter
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Section 16 D/A Converter
Table 16.1
Table 16.2
Section 17 LCD Controller/Driver
Table 17.1
Table 17.2
Table 17.3
Table 17.4
Table 17.5
Table 17.6
Table 17.7
Section 18 DTMF Generation Circuit
Table 18.1
Table 18.2
Section 20 ROM
Table 20.1
Table 20.2
Table 20.3
Table 20.4
Table 20.5
Table 20.6
Table 20.7
Section 21 Clock Pulse Generator
Table 21.1
Table 21.2
Table 21.3
I
Pin Configuration ................................................................................................... 445
Analog Input Channels and Corresponding ADDR Registers................................ 446
A/D Conversion Time (Single Mode) .................................................................... 455
A/D Conversion Time (Scan Mode)....................................................................... 455
A/D Converter Interrupt Source ............................................................................. 456
Analog Pin Specifications ...................................................................................... 461
Pin Configuration ................................................................................................... 464
D/A Conversion Control ........................................................................................ 466
Pin Configuration ................................................................................................... 471
Duty Cycle and Common Function Selection ........................................................ 473
Segment Driver Selection (1) (H8S/2268 Group) .................................................. 474
Segment Driver Selection (2) (H8S/2264 Group) .................................................. 475
Frame Frequency Selection .................................................................................... 477
Output Levels ......................................................................................................... 488
Power-Down Modes and Display Operation.......................................................... 490
Pin Configuration ................................................................................................... 494
Frequency Deviation between DTMF Output Signals and Typical Signals........... 498
Differences between Boot Mode and User Program Mode.................................... 505
Pin Configuration ................................................................................................... 511
Setting On-Board Programming Modes................................................................. 518
Boot Mode Operation............................................................................................. 520
System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is
Possible .................................................................................................................. 520
Flash Memory Operating States ............................................................................. 532
Registers Present in F-ZTAT Version but Absent in Masked ROM Version ........ 538
Damping Resistance Value .................................................................................... 544
Crystal Resonator Characteristics........................................................................... 544
External Clock Input Conditions ............................................................................ 545
2
C Bus Timing (with Maximum Influence of t
Rev. 5.00 Sep. 01, 2009 Page xlix of l
Sr
/t
Sf
)............................................... 432
REJ09B0071-0500