DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 451

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

When, with the I
must be checked in order to identify the source that set IRIC to 1. Although each source has a
corresponding flag, caution is needed at the end of a transfer.
When the TDRE or RDRF internal flag is set, the readable IRTR flag may or may not be set. In
the H8S/2268 Group, even when data transfer is complete, the DTC activation request flag, IRTR,
is not set until a retransmission start condition or stop condition is detected after a slave address
(SVA) or general call address matched in the I
Even when the IRIC flag and IRTR flag are set, the TDRE or RDRF internal flag may not be set.
For a continuous transfer using the DTC in the H8S/2268 Group, the IRIC or IRTR flag is not
cleared at the completion of the specified number of times of transfers. On the other hand, the
TDRE and RDRF flags are cleared because the specified number of times of read/write operations
have been complete.
Table 14.4 shows the relationship between the flags and the transfer states.
Bit
0
Bit Name
SCP
2
C bus format selected, IRIC is set to 1 and an interrupt is generated, other flags
Section 14 I
Initial
Value
1
2
C Bus Interface (IIC) (Supported as an Option by H8S/2264 Group)
R/W
W
Description
Start Condition/Stop Condition Prohibit bit
The SCP bit controls the issue of start/stop conditions in
master mode.
To issue a start condition, write 1 in BBSY and 0 in SCP.
A retransmit start condition is issued in the same way. To
issue a stop condition, write 0 in BBSY and 0 in SCP.
This bit is always read as 1. Data is not stored even if it
is written.
2
C bus format slave mode.
Rev. 5.00 Sep. 01, 2009 Page 399 of 656
REJ09B0071-0500