DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 335

IC H8S/2268 MCU FLASH 100QFP

DF2268FA13V

Manufacturer Part Number
DF2268FA13V
Description
IC H8S/2268 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2268FA13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2268FA13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note: * Only a 0 can be written to this bit, to clear the flag.
11.10.2 Timer Counters 4 to 7 (TCNT4 to TCNT7)
Each TCNT is an 8-bit readable up-counter and increments on clock pulses generated from an
internal or external clock source. This clock source is selected by clock select bits CKS2 to CKS0
in TCR
TCNT_4 and TCNT_5, or TCNT_6 and TCNT_7 comprise a single 16-bit register, and can be
accessed simultaneously by word access.
When TCNT overflows from H'FF to H'00, the overflow flag (OVF) in TCR is set to 1.
TCNT is initialized to H'00 by a reset or in hardware standby mode.
11.10.3 Time Reload Registers 4 to 7 (TLR_4 to TLR_7)
Each TLR is an 8-bit writable register and sets a reload value for TCNT. When a reload value is
set to TLR, the value is simultaneously load to TCNT and incrementation starts from the value.
When TCNT overflows during automatic reload operation, the TLR value is written to TCNT.
Therefore, the overflow cycle can be set within the range from 1 to 256 input clock cycles.
Bit
2 to 0
Bit Name
CKS2
CKS1
CKS0
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Clock Select 2 to 0
The input clock can be selected from internal clocks and
an external clock, which are divided from the system
clock (φ) or subclock (φ
000: φ/32768
001: φ/2048
010: φ/128
011: φ/8
100: φ
101: φ
110: φ
111: TCNT_5
Channel4
overflow
SUB
SUB
SUB
/256
/64
/8
Rev. 5.00 Sep. 01, 2009 Page 283 of 656
Channel5
φ/8192
φ/512
φ
φ
φ
TCNT_6
overflow
φ/32
φ/2
SUB
SUB
SUB
/128
/32
/2
SUB
).
Channel6
φ/32768
φ/2048
φ/128
φ/8
φ
φ
φ
TCNT_7
overflow
SUB
SUB
SUB
Section 11 8-Bit Timers
/256
/64
/8
REJ09B0071-0500
Channel7
φ/8192
φ/512
φ/32
φ
φ
φ
Count of the
rising clock of
the external
clock.
φ/2
SUB
SUB
SUB
/128
/32
/2

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