DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 484

IC H8S/2268 MCU FLASH 100QFP

DF2268FA13V

Manufacturer Part Number
DF2268FA13V
Description
IC H8S/2268 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2268FA13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2268FA13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 I
Table 14.9 I
Notes: 1. Does not meet the I
Rev. 5.00 Sep. 01, 2009 Page 432 of 656
REJ09B0071-0500
Item
t
t
t
t
t
t
t
(master)
t
(slave)
t
SCLHO
SCLLO
BUFO
STAHO
STASO
STOSO
SDASO
SDASO
SDAHO
2. Calculated using the I
t
0.5 t
0.5 t
0.5 t
( –t
0.5 t
(–t
1 t
0.5 t
(–t
1t
(–t
1 t
3 t
(–t
3 t
cyc
SCLLO
is necessary: (a) secure a start/stop condition issuance interval; (b) adjust the rise and
fall times by means of a pull-up resistor and capacitive load; (c) reduce the transfer rate;
(d) select slave devices whose input timing permits this output timing.
The values in the above table will vary depending on the settings of the IICX bit and bits
CKS0 to CKS2. Depending on the frequency it may not be possible to achieve the
maximum transfer rate; therefore, whether or not the I
met must be determined in accordance with the actual setting conditions.
speed mode: 1300 ns min.).
SCLO
SCLL
cyc
cyc
Sf
Sr
Sr
Sr
Indication
Sr
)
)
)
)
2
*
SCLO
SCLO
SCLO
)
SCLO
SCLO
C Bus Interface (IIC) (Supported as an Option by H8S/2264 Group)
*
2
*
2
(–t
2
C Bus Timing (with Maximum Influence of t
2
–1 t
–1 t
+ 2 t
–3t
(–t
(–t
Sr
)
Sr
Sf
cyc
cyc
cyc
)
)
cyc
Standard mode
High-speed mode –300
Standard mode
High-speed mode –250
Standard mode
High-speed mode –300
Standard mode
High-speed mode –250
Standard mode
High-speed mode –300
Standard mode
High-speed mode –300
Standard mode
High-speed mode –300
Standard mode
High-speed mode –300
Standard mode
High-speed mode 0
2
C bus interface specification. Remedial action such as the following
2
C bus specification values (standard mode: 4700 ns min.; high-
t
Influence
(Max.)
–1000
–250
–1000
–250
–1000
–1000
–1000
–1000
0
Sr
/t
Sf
I
Specifi-
cation
(Min.)
4000
600
4700
1300
4700
1300
4000
600
4700
600
4000
600
250
100
250
100
0
0
2
Time Indication (at Maximum Transfer Rate) [ns]
C Bus
φ =
5 MHz
4000
950
4750
1000 *
3800 *
750 *
4550
800
9000
2200
4400
1350
3100
400
3100
400
600
600
1
1
1
Sr
/t
2
Sf
φ =
8 MHz
4000
950
4750
1000 *
3875 *
825 *
4625
875
9000
2200
4250
1200
3325
625
3325
625
375
375
C bus interface specifications are
)
1
1
1
4000
950
4750
1000 *
3900 *
850 *
4650
900
9000
2200
4200
1150
3400
700
3400
700
300
300
φ =
10 MHz
1
1
1
4000
950
4750
4688
938
9000
2200
4125
1075
3513
813
3513
813
188
188
1000 *
3938 *
888 *
φ =
16 MHz
1
1
1
4000
950
4750
1000 *
3950 *
900 *
4700
950
9000
2200
4100
1050
3550
850
3550
850
150
150
φ =
20 MHz
1
1
1

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